From: Conor Dooley <conor@kernel.org>
To: William Qiu <william.qiu@starfivetech.com>
Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Emil Renner Berthing <kernel@esmil.dk>
Subject: Re: [RESEND v6 1/2] dt-bindings: soc: starfive: Add StarFive syscon doc
Date: Wed, 15 Mar 2023 19:00:32 +0000 [thread overview]
Message-ID: <043a859e-76fb-436b-9ce1-bc03aeb62ad0@spud> (raw)
In-Reply-To: <20230315055813.94740-2-william.qiu@starfivetech.com>
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On Wed, Mar 15, 2023 at 01:58:12PM +0800, William Qiu wrote:
> Add documentation to describe StarFive System Controller Registers.
>
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
I thought I'd already left an R-b tag against this, but w/e, here it is
again:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
I'll pick this one up once either Krzysztof or Rob have reviewed it.
Cheers,
Conor.
> ---
> .../soc/starfive/starfive,jh7110-syscon.yaml | 41 +++++++++++++++++++
> MAINTAINERS | 5 +++
> 2 files changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> new file mode 100644
> index 000000000000..ae7f1d6916af
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 SoC system controller
> +
> +maintainers:
> + - William Qiu <william.qiu@starfivetech.com>
> +
> +description: |
> + The StarFive JH7110 SoC system controller provides register information such
> + as offset, mask and shift to configure related modules such as MMC and PCIe.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - starfive,jh7110-aon-syscon
> + - starfive,jh7110-stg-syscon
> + - starfive,jh7110-sys-syscon
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@10240000 {
> + compatible = "starfive,jh7110-stg-syscon", "syscon";
> + reg = <0x10240000 0x1000>;
> + };
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 958b7ec118b4..fdad60cc9f2e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19964,6 +19964,11 @@ S: Supported
> F: Documentation/devicetree/bindings/rng/starfive*
> F: drivers/char/hw_random/jh7110-trng.c
>
> +STARFIVE JH7110 SYSCON
> +M: William Qiu <william.qiu@starfivetech.com>
> +S: Supported
> +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> +
> STATIC BRANCH/CALL
> M: Peter Zijlstra <peterz@infradead.org>
> M: Josh Poimboeuf <jpoimboe@kernel.org>
> --
> 2.34.1
>
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next prev parent reply other threads:[~2023-03-15 19:01 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-15 5:58 [RESEND v6 0/2] StarFive's SDIO/eMMC driver support William Qiu
2023-03-15 5:58 ` [RESEND v6 1/2] dt-bindings: soc: starfive: Add StarFive syscon doc William Qiu
2023-03-15 19:00 ` Conor Dooley [this message]
2023-03-19 12:27 ` Krzysztof Kozlowski
2023-03-20 5:54 ` William Qiu
2023-03-20 6:38 ` Krzysztof Kozlowski
2023-03-20 7:32 ` William Qiu
2023-04-05 16:38 ` Conor Dooley
2023-04-06 2:20 ` William Qiu
2023-03-19 12:29 ` Krzysztof Kozlowski
2023-03-20 6:00 ` William Qiu
2023-03-20 6:38 ` Krzysztof Kozlowski
2023-03-20 7:31 ` William Qiu
2023-03-15 5:58 ` [RESEND v6 2/2] riscv: dts: starfive: Add syscon node William Qiu
2023-03-15 18:57 ` Conor Dooley
2023-03-15 21:03 ` Emil Renner Berthing
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