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From: Jesse Taube <mr.bossman075@gmail.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Yimin Gu <ustcymgu@gmail.com>,
	Waldemar Brodkorb <wbx@openadk.org>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Subject: Re: [PATCH v1 1/2] riscv: Kconfig: Allow RV32 to build with no MMU
Date: Fri, 20 Jan 2023 12:39:06 -0500	[thread overview]
Message-ID: <056f0d30-d340-fdc4-3744-1cdedd8b4048@gmail.com> (raw)
In-Reply-To: <Y8pJ4y7FyBDQPqIT@wendy>



On 1/20/23 02:59, Conor Dooley wrote:
> Hello!
> 
> Since you'll have to re-submit, making sure that allowing !MMU on rv32
> doesn't break the build due to canaan k210 drivers being enabled despite
> relying on 64-bit divisions, I've got some nits for you.
Not sure what driver needs 64bit, but sense !MMU was only selected by 
64BIT. This should work.
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 69774bb362d6..b9835b8ede86 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -43,7 +43,7 @@ config SOC_VIRT

  config SOC_CANAAN
         bool "Canaan Kendryte K210 SoC"
-       depends on !MMU
+       depends on !MMU && 64BIT
         select CLINT_TIMER if RISCV_M_MODE
         select SERIAL_SIFIVE if TTY
         select SERIAL_SIFIVE_CONSOLE if TTY

> On Thu, Jan 19, 2023 at 12:26:41AM -0500, Jesse Taube wrote:
>> From: Yimin Gu <ustcymgu@gmail.com>
>>
>> Some RISC-V 32bit ores do not have an MMU, and the kernel should be
> 
>   s/ores/cores
OH thanks sorry for the spelling mistakes.

Thanks,
Jesse Taube
>> able to build for them. This patch enables the RV32 to be built with
>> no MMU support.
>>
>> Signed-off-by: Yimin Gu <ustcymgu@gmail.com>
>> CC: Jesse Taube <Mr.Bossman075@gmail.com>
>> Tested-By: Waldemar Brodkorb <wbx@openadk.org>
> 
> And the automation complains that this tag is not "Tested-by:"
> 
> Thanks,
> Conor.
> 
>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
>> ---
>>   arch/riscv/Kconfig | 5 ++---
>>   1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 59d18881f35b..49759dbe6a8f 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -163,8 +163,8 @@ config MMU
>>   
>>   config PAGE_OFFSET
>>   	hex
>> -	default 0xC0000000 if 32BIT
>> -	default 0x80000000 if 64BIT && !MMU
>> +	default 0xC0000000 if 32BIT && MMU
>> +	default 0x80000000 if !MMU
>>   	default 0xff60000000000000 if 64BIT
>>   
>>   config KASAN_SHADOW_OFFSET
>> @@ -262,7 +262,6 @@ config ARCH_RV32I
>>   	select GENERIC_LIB_ASHRDI3
>>   	select GENERIC_LIB_LSHRDI3
>>   	select GENERIC_LIB_UCMPDI2
>> -	select MMU
>>   
>>   config ARCH_RV64I
>>   	bool "RV64I"
>> -- 
>> 2.39.0
>>
>>

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  reply	other threads:[~2023-01-20 17:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19  5:26 [PATCH v1 0/2] Add RISC-V 32 NOMMU support Jesse Taube
2023-01-19  5:26 ` [PATCH v1 1/2] riscv: Kconfig: Allow RV32 to build with no MMU Jesse Taube
2023-01-20  7:33   ` kernel test robot
2023-01-20  7:59   ` Conor Dooley
2023-01-20 17:39     ` Jesse Taube [this message]
2023-01-20 20:44       ` Conor Dooley
2023-01-20 20:48         ` Conor Dooley
2023-01-20 20:51           ` Jesse Taube
2023-01-20 20:57             ` Conor Dooley
2023-01-21 15:00               ` Conor Dooley
2023-01-19  5:26 ` [PATCH v1 2/2] riscv: configs: Add nommu decfconfig for RV32 Jesse Taube
2023-01-20  8:05   ` Conor Dooley

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