From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Anup Patel <anup@brainfault.org>, Conor Dooley <conor@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 6/9] dt-bindings: Add RISC-V advanced PLIC bindings
Date: Tue, 3 Jan 2023 09:59:04 +0100 [thread overview]
Message-ID: <082eb006-75b8-dead-c014-9ba41a697e50@linaro.org> (raw)
In-Reply-To: <CAAhSdy2UAMmX+W5Cm3DuTJzZ0jJ3=CW4PhjctQNdfeS+4hqWqg@mail.gmail.com>
On 02/01/2023 17:50, Anup Patel wrote:
> On Sun, Nov 13, 2022 at 9:14 PM Conor Dooley <conor@kernel.org> wrote:
>>
>> Hey Anup,
>>
>> Ditto the $subject nit here.
>
> Adding "interrupt-controller:" to subject makes it longer than 80 characters.
Because you added redundant double "bindings". Subject line is precious,
so do not add useless words.
Best regards,
Krzysztof
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next prev parent reply other threads:[~2023-01-03 9:07 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 4:41 [PATCH 0/9] Linux RISC-V AIA Support Anup Patel
2022-11-11 4:41 ` [PATCH 1/9] RISC-V: Add AIA related CSR defines Anup Patel
2022-11-11 4:42 ` [PATCH 2/9] RISC-V: Detect AIA CSRs from ISA string Anup Patel
2022-11-13 14:20 ` Conor Dooley
2022-11-11 4:42 ` [PATCH 3/9] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2022-11-11 4:42 ` [PATCH 4/9] dt-bindings: Add RISC-V incoming MSI controller bindings Anup Patel
2022-11-11 9:11 ` Atish Patra
2022-11-13 14:48 ` Conor Dooley
2022-11-14 12:29 ` Anup Patel
2022-11-15 22:34 ` Conor Dooley
2022-11-16 9:00 ` Krzysztof Kozlowski
2022-11-16 9:20 ` Conor Dooley
2022-11-16 9:21 ` Krzysztof Kozlowski
2022-11-16 10:34 ` Anup Patel
2022-11-16 13:29 ` Conor Dooley
2022-11-14 9:49 ` Krzysztof Kozlowski
2022-11-14 12:06 ` Anup Patel
2022-11-14 12:14 ` Conor Dooley
2022-11-14 12:21 ` Krzysztof Kozlowski
2022-11-14 15:04 ` Anup Patel
2022-11-15 14:15 ` Krzysztof Kozlowski
2022-11-16 19:14 ` Rob Herring
2023-01-02 15:59 ` Anup Patel
2022-11-11 4:42 ` [PATCH 5/9] irqchip: Add RISC-V incoming MSI controller driver Anup Patel
2022-11-11 16:02 ` Andrew Bresticker
2023-01-02 16:25 ` Anup Patel
2022-11-23 7:28 ` Ruan Jinjie
2023-01-03 13:42 ` Anup Patel
2022-11-11 4:42 ` [PATCH 6/9] dt-bindings: Add RISC-V advanced PLIC bindings Anup Patel
2022-11-13 15:44 ` Conor Dooley
2023-01-02 16:50 ` Anup Patel
2023-01-02 18:17 ` Conor Dooley
2023-01-03 5:10 ` Anup Patel
2023-01-03 8:59 ` Krzysztof Kozlowski [this message]
2023-01-03 13:05 ` Anup Patel
2022-11-14 9:51 ` Krzysztof Kozlowski
2022-11-14 12:11 ` Anup Patel
2022-11-16 19:27 ` Rob Herring
2023-01-02 17:18 ` Anup Patel
2022-11-11 4:42 ` [PATCH 7/9] irqchip: Add RISC-V advanced PLIC driver Anup Patel
2022-11-11 23:17 ` Andrew Bresticker
2022-11-11 4:42 ` [PATCH 8/9] RISC-V: Select APLIC and IMSIC drivers for QEMU virt machine Anup Patel
2022-11-15 22:29 ` Conor Dooley
2022-11-11 4:42 ` [PATCH 9/9] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2022-11-11 9:07 ` [PATCH 0/9] Linux RISC-V AIA Support Atish Patra
2022-11-11 9:13 ` Atish Patra
2022-11-11 19:01 ` Atish Patra
2023-01-02 10:06 ` Anup Patel
2023-01-02 10:05 ` Anup Patel
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