Re: [PATCH] dt-bindings: reset: Add Kendryte K230 reset controller bindings

From: Krzysztof Kozlowski <krzk@kernel.org>
To: q691800735@163.com, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	alex@ghiti.fr, p.zabel@pengutronix.de, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dt-bindings: reset: Add Kendryte K230 reset controller bindings
Date: Wed, 3 Dec 2025 10:48:12 +0100	[thread overview]
Message-ID: <0d64e8f4-8b95-43df-b802-b85082545824@kernel.org> (raw)
In-Reply-To: <20251203092632.219525-1-q691800735@163.com>

On 03/12/2025 10:26, q691800735@163.com wrote:
> From: jybruceupup <q691800735@163.com>
> 
> Add canaan-k230-reset.h to define reset IDs, types and register offsets
> for Kendryte K230 RISC-V SoC, covering CPU, peripherals and subsystems.
> 
> Update MAINTAINERS RISC-V entry to include the new reset binding header
> for proper maintenance tracking.
> 
> Signed-off-by: jybruceupup <q691800735@163.com>
> ---
>  MAINTAINERS                                   |   1 +
>  include/dt-bindings/reset/canaan-k230-reset.h | 513 ++++++++++++++++++
>  2 files changed, 514 insertions(+)
>  create mode 100644 include/dt-bindings/reset/canaan-k230-reset.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d83920cbc..b489ab6cd 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -22105,6 +22105,7 @@ C:	irc://irc.libera.chat/riscv
>  P:	Documentation/arch/riscv/patch-acceptance.rst
>  T:	git git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
>  F:	arch/riscv/
> +F:	include/dt-bindings/reset/canaan-k230-reset.h

Filename matching compatible.

>  F:	include/dt-bindings/soc/canaan,k230_pm_domains.h
>  N:	riscv
>  K:	riscv
> diff --git a/include/dt-bindings/reset/canaan-k230-reset.h b/include/dt-bindings/reset/canaan-k230-reset.h
> new file mode 100644
> index 000000000..17a9719b0
> --- /dev/null
> +++ b/include/dt-bindings/reset/canaan-k230-reset.h
> @@ -0,0 +1,513 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.

Please don't send us downstream code. There is no single line in
upstream like that, so take it as an example.

> + */
> +#ifndef _DT_BINDINGS_CANAAN_K230_RESET_H_
> +#define _DT_BINDINGS_CANAAN_K230_RESET_H_
> +
> +/* reset register offset */
> +#define K230_RESET_REG_OFFSET_SHIFT     16
> +#define K230_RESET_REG_OFFSET_MASK      0xffff0000

Register offsets are not bindings.

And finally - where is any user of it? Please send bindings with users
or explain why there is no user (with proper rationale) in commit msg.

Best regards,
Krzysztof

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv