Re: [PATCH 2/3] spi: dt-bindings: Add num-cs property for mpfs-spi

From: Krzysztof Kozlowski <krzk@kernel.org>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>,
	Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	linux-riscv@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	valentina.fernandezalanis@microchip.com
Subject: Re: [PATCH 2/3] spi: dt-bindings: Add num-cs property for mpfs-spi
Date: Thu, 2 May 2024 16:53:40 +0200	[thread overview]
Message-ID: <10671947-f418-4520-a29f-4ce129770e65@kernel.org> (raw)
In-Reply-To: <20240502143410.12629-3-prajna.rajendrakumar@microchip.com>

On 02/05/2024 16:34, Prajna Rajendra Kumar wrote:
> The PolarFire SoC SPI controller supports multiple chip selects,but in
> the MSS, only one CS line is physically wired. To reflect this hardware
> limitation in the device tree, the binding enforces that the 'num-cs'
> property defaults to 1 and cannot exceed 1 unless additional
> chip select lines are explicitly defined using GPIO descriptors.
> 

You marked it as Fix for bug, but I don't understand where the bug is.
Do you describe above the issue or the solution?

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: microchip,mpfs-spi
> +      not:
> +        required:
> +          - cs-gpios

I don't understand what you are expressing here. Did you actually
validate it that it achieves exactly what you want?

> +    then:
> +      properties:
> +        num-cs:
> +          default: 1
> +          maximum: 1
> +
>  unevaluatedProperties: false
>  
>  examples:

Best regards,
Krzysztof

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