From: Vincent Chen <vincent.chen@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: Frank.Zhao@starfivetech.com, atish.patra@wdc.com,
anup.patel@wdc.com, guoren@kernel.org, alankao@andestech.com,
paul.walmsley@sifive.com, Vincent Chen <vincent.chen@sifive.com>
Subject: [RFC patch 1/4] riscv: Add 3 SBI wrapper functions to get cpu manufacturer information
Date: Mon, 8 Mar 2021 11:58:14 +0800 [thread overview]
Message-ID: <1615175897-23509-2-git-send-email-vincent.chen@sifive.com> (raw)
In-Reply-To: <1615175897-23509-1-git-send-email-vincent.chen@sifive.com>
Add 3 wrapper functions to get vendor id, architecture id and implement id
from M-mode
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
---
arch/riscv/include/asm/sbi.h | 3 +++
arch/riscv/kernel/sbi.c | 15 +++++++++++++++
2 files changed, 18 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 99895d9c3bdd..94a7f664caf4 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -97,6 +97,9 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+long sbi_get_vendorid(void);
+long sbi_get_archid(void);
+long sbi_get_impid(void);
void sbi_set_timer(uint64_t stime_value);
void sbi_shutdown(void);
void sbi_clear_ipi(void);
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index f4a7db3d309e..33e3a9d6efab 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -547,6 +547,21 @@ static inline long sbi_get_firmware_version(void)
return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
}
+long sbi_get_vendorid(void)
+{
+ return __sbi_base_ecall(SBI_EXT_BASE_GET_MVENDORID);
+}
+
+long sbi_get_archid(void)
+{
+ return __sbi_base_ecall(SBI_EXT_BASE_GET_MARCHID);
+}
+
+long sbi_get_impid(void)
+{
+ return __sbi_base_ecall(SBI_EXT_BASE_GET_MIMPID);
+}
+
static void sbi_send_cpumask_ipi(const struct cpumask *target)
{
struct cpumask hartid_mask;
--
2.7.4
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next prev parent reply other threads:[~2021-03-08 3:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 3:58 [RFC patch 0/4] riscv: introduce alternative mechanism to apply errata patches Vincent Chen
2021-03-08 3:58 ` Vincent Chen [this message]
2021-03-10 4:39 ` [RFC patch 1/4] riscv: Add 3 SBI wrapper functions to get cpu manufacturer information Palmer Dabbelt
2021-03-11 5:21 ` Vincent Chen
2021-03-08 3:58 ` [RFC patch 2/4] riscv: Get CPU " Vincent Chen
2021-03-08 23:30 ` Damien Le Moal
2021-03-09 1:23 ` Sean Anderson
2021-03-09 1:24 ` Vincent Chen
2021-03-09 1:59 ` Damien Le Moal
2021-03-09 1:28 ` Guo Ren
2021-03-09 1:46 ` Vincent Chen
2021-03-09 5:11 ` Anup Patel
2021-03-10 2:50 ` Guo Ren
2021-03-10 3:40 ` Palmer Dabbelt
2021-03-10 3:56 ` Guo Ren
2021-03-10 4:39 ` Palmer Dabbelt
2021-03-08 3:58 ` [RFC patch 3/4] riscv: Introduce alternative mechanism to apply errata solution Vincent Chen
2021-03-10 4:39 ` Palmer Dabbelt
2021-03-12 3:40 ` Vincent Chen
2021-03-08 3:58 ` [RFC patch 4/4] riscv: sifive: apply errata "cip-453" patch Vincent Chen
2021-03-10 4:39 ` Palmer Dabbelt
2021-03-12 3:50 ` Vincent Chen
2021-03-10 4:39 ` [RFC patch 0/4] riscv: introduce alternative mechanism to apply errata patches Palmer Dabbelt
2021-03-11 7:09 ` Vincent Chen
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