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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id m12sm3606861ots.59.2021.11.08.20.06.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Nov 2021 20:06:41 -0800 (PST) Received: (nullmailer pid 743043 invoked by uid 1000); Tue, 09 Nov 2021 04:06:29 -0000 From: Rob Herring To: conor.dooley@microchip.com Cc: robh+dt@kernel.org, gregkh@linuxfoundation.org, linus.walleij@linaro.org, linux-riscv@lists.infradead.org, aou@eecs.berkeley.edu, paul.walmsley@sifive.com, linux-usb@vger.kernel.org, daire.mcnamara@microchip.com, linux-spi@vger.kernel.org, geert@linux-m68k.org, devicetree@vger.kernel.org, linux-rtc@vger.kernel.org, linux-gpio@vger.kernel.org, broonie@kernel.org, palmer@dabbelt.com, bgolaszewski@baylibre.com, jassisinghbrar@gmail.com, linux-crypto@vger.kernel.org, ivan.griffin@microchip.com, atish.patra@wdc.com, lewis.hanly@microchip.com, bin.meng@windriver.com, alexandre.belloni@bootlin.com, krzysztof.kozlowski@canonical.com, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, a.zummo@towertech.it In-Reply-To: <20211108150554.4457-11-conor.dooley@microchip.com> References: <20211108150554.4457-1-conor.dooley@microchip.com> <20211108150554.4457-11-conor.dooley@microchip.com> Subject: Re: [PATCH 10/13] dt-bindings: spi: add bindings for microchip mpfs spi Date: Mon, 08 Nov 2021 22:06:29 -0600 Message-Id: <1636430789.935637.743042.nullmailer@robh.at.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211108_200642_396981_3A7153F2 X-CRM114-Status: GOOD ( 12.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 08 Nov 2021 15:05:51 +0000, conor.dooley@microchip.com wrote: > From: Conor Dooley > > Add device tree bindings for the {q,}spi controller on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley > --- > .../bindings/spi/microchip,mpfs-spi.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/spi/microchip,mpfs-spi.example.dts:19:18: fatal error: dt-bindings/clock/microchip,mpfs-clock.h: No such file or directory 19 | #include "dt-bindings/clock/microchip,mpfs-clock.h" | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[1]: *** [scripts/Makefile.lib:385: Documentation/devicetree/bindings/spi/microchip,mpfs-spi.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1441: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1552385 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv