From: Rob Herring <robh@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Stephen Boyd <sboyd@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Rob Herring <robh+dt@kernel.org>,
Hugh Breslin <hugh.breslin@microchip.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-clk@vger.kernel.org,
Daire McNamara <daire.mcnamara@microchip.com>
Subject: Re: [PATCH v2 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks
Date: Mon, 22 Aug 2022 14:40:42 -0500 [thread overview]
Message-ID: <1661197242.557172.413609.nullmailer@robh.at.kernel.org> (raw)
In-Reply-To: <20220822112928.2727437-3-conor.dooley@microchip.com>
On Mon, 22 Aug 2022 12:29:25 +0100, Conor Dooley wrote:
> On PolarFire SoC there are 4 PLL/DLL blocks, located in each of the
> ordinal corners of the chip, which our documentation refers to as
> "Clock Conditioning Circuitry". PolarFire SoC is an FPGA, these are
> highly configurable & many of the input clocks are optional.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/clock/microchip,mpfs-ccc.yaml | 81 +++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.example.dtb: clock-controller@38100000: 'clock-output-names' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
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next prev parent reply other threads:[~2022-08-22 20:20 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 11:29 [PATCH v2 0/6] Add PolarFire SoC Fabric Clock Conditioning Circuitry Support Conor Dooley
2022-08-22 11:29 ` [PATCH v2 1/6] dt-bindings: clk: rename mpfs-clkcfg binding Conor Dooley
2022-08-22 11:29 ` [PATCH v2 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Conor Dooley
2022-08-22 11:53 ` Conor.Dooley
2022-08-22 19:40 ` Rob Herring [this message]
2022-08-22 19:44 ` Conor.Dooley
2022-08-22 21:53 ` Rob Herring
2022-08-22 11:29 ` [PATCH v2 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids Conor Dooley
2022-08-22 11:29 ` [PATCH v2 4/6] clk: microchip: add PolarFire SoC fabric clock support Conor Dooley
2022-08-22 11:29 ` [PATCH v2 5/6] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-08-22 11:29 ` [PATCH v2 6/6] riscv: dts: microchip: add the mpfs' fabric clock control Conor Dooley
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