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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id s63-20020aca4542000000b00342df642fd3sm2735031oia.48.2022.08.22.12.40.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 12:40:43 -0700 (PDT) Received: (nullmailer pid 413610 invoked by uid 1000); Mon, 22 Aug 2022 19:40:42 -0000 From: Rob Herring To: Conor Dooley Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Turquette , linux-riscv@lists.infradead.org, Palmer Dabbelt , Stephen Boyd , Albert Ou , Rob Herring , Hugh Breslin , Krzysztof Kozlowski , Paul Walmsley , linux-clk@vger.kernel.org, Daire McNamara In-Reply-To: <20220822112928.2727437-3-conor.dooley@microchip.com> References: <20220822112928.2727437-1-conor.dooley@microchip.com> <20220822112928.2727437-3-conor.dooley@microchip.com> Subject: Re: [PATCH v2 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Date: Mon, 22 Aug 2022 14:40:42 -0500 Message-Id: <1661197242.557172.413609.nullmailer@robh.at.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220822_124045_837169_021FDECF X-CRM114-Status: GOOD ( 12.75 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 22 Aug 2022 12:29:25 +0100, Conor Dooley wrote: > On PolarFire SoC there are 4 PLL/DLL blocks, located in each of the > ordinal corners of the chip, which our documentation refers to as > "Clock Conditioning Circuitry". PolarFire SoC is an FPGA, these are > highly configurable & many of the input clocks are optional. > > Signed-off-by: Conor Dooley > --- > .../bindings/clock/microchip,mpfs-ccc.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.example.dtb: clock-controller@38100000: 'clock-output-names' is a required property From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv