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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id n22-20020a056870241600b001317413344esm355801oap.47.2022.09.29.18.55.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Sep 2022 18:55:56 -0700 (PDT) Received: (nullmailer pid 3142038 invoked by uid 1000); Fri, 30 Sep 2022 01:55:55 -0000 From: Rob Herring To: Hal Feng Cc: Thomas Gleixner , Philipp Zabel , Palmer Dabbelt , linux-riscv@lists.infradead.org, Krzysztof Kozlowski , Paul Walmsley , Michael Turquette , linux-kernel@vger.kernel.org, Linus Walleij , Rob Herring , linux-clk@vger.kernel.org, Marc Zyngier , devicetree@vger.kernel.org, Daniel Lezcano , Stephen Boyd , Emil Renner Berthing , linux-gpio@vger.kernel.org, Albert Ou In-Reply-To: <20220929222647.23816-1-hal.feng@linux.starfivetech.com> References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> <20220929222647.23816-1-hal.feng@linux.starfivetech.com> Message-Id: <166450294103.3141703.10888748010920074288.robh@kernel.org> Subject: Re: [PATCH v1 17/30] dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings Date: Thu, 29 Sep 2022 20:55:55 -0500 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220929_185600_553879_77A934D3 X-CRM114-Status: GOOD ( 12.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 30 Sep 2022 06:26:47 +0800, Hal Feng wrote: > From: Emil Renner Berthing > > Add bindings for the system clock generator on the JH7110 > RISC-V SoC by StarFive Technology Ltd. > > Signed-off-by: Emil Renner Berthing > Signed-off-by: Hal Feng > --- > .../clock/starfive,jh7110-clkgen-sys.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-sys.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-sys.example.dts:18.47-31.11: Warning (unit_address_vs_reg): /example-0/clock-controller@13020000: node has a unit name, but no reg or ranges property doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv