Re: [v1, 0/2] Initialize Vector registers in the first-use trap - patchwork-bot+linux-riscv

From: patchwork-bot+linux-riscv@kernel.org
To: Andy Chiu <andy.chiu@sifive.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	paul.walmsley@sifive.com, vineetg@rivosinc.com,
	greentime.hu@sifive.com, guoren@linux.alibaba.com,
	bjorn@rivosinc.com, aou@eecs.berkeley.edu
Subject: Re: [v1, 0/2] Initialize Vector registers in the first-use trap
Date: Tue, 04 Jul 2023 15:02:32 +0000	[thread overview]
Message-ID: <168848295230.29521.2754654664168260934.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20230627015556.12329-1-andy.chiu@sifive.com>

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 27 Jun 2023 01:55:53 +0000 you wrote:
> Before applying this series, We only initialize the space for saving
> Vector registers. This is not enough as Vector registers themselves also
> neeeded to be initialized before dropping back into userspace. Or, we
> may risk leaking a process's data left in Vector register to another
> process. This can be verified by only applying the second patch and
> running the test.
> 
> [...]

Here is the summary with links:
  - [v1,1/2] riscv: vector: clear V-reg in the first-use trap
    https://git.kernel.org/riscv/c/75b59f2a90aa
  - [v1,2/2] selftests: Test RISC-V Vector's first-use handler
    https://git.kernel.org/riscv/c/5c93c4c72fbc

You are awesome, thank you!
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