Re: [v1, 0/3] riscv: fix ptrace and export VLENB - patchwork-bot+linux-riscv

From: patchwork-bot+linux-riscv@kernel.org
To: Andy Chiu <andy.chiu@sifive.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	greentime.hu@sifive.com, guoren@linux.alibaba.com,
	bjorn@kernel.org, conor.dooley@microchip.com,
	paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Subject: Re: [v1, 0/3] riscv: fix ptrace and export VLENB
Date: Wed, 23 Aug 2023 19:40:23 +0000	[thread overview]
Message-ID: <169281962371.18988.17683864280326589373.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20230816155450.26200-1-andy.chiu@sifive.com>

Hello:

This series was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Wed, 16 Aug 2023 15:54:47 +0000 you wrote:
> We add a vlenb field in Vector context and save it with the
> riscv_vstate_save() macro. It should not cause performance regression as
> VLENB is a design-time constant and is frequently used by hardware.
> Also, adding this field into the __sc_riscv_v_state may benifit us on a
> future compatibility issue becuse a hardware may have writable VLENB.
> 
> Adding and saving VLENB have an immediate benifit as it gives ptrace a
> better view of the Vector extension and makes it possible to reconstruct
> Vector register files from the dump without doing an additional csr read.
> 
> [...]

Here is the summary with links:
  - [v1,1/3] RISC-V: Remove ptrace support for vectors
    https://git.kernel.org/riscv/c/e3f9324b231a
  - [v1,2/3] RISC-V: vector: export VLENB csr in __sc_riscv_v_state
    https://git.kernel.org/riscv/c/c35f3aa34509
  - [v1,3/3] RISC-V: Add ptrace support for vectors
    (no matching commit)

You are awesome, thank you!
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