From: patchwork-bot+linux-riscv@kernel.org
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
conor.dooley@microchip.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] dt-bindings: riscv: permit numbers in "riscv,isa"
Date: Thu, 11 Jan 2024 14:50:37 +0000 [thread overview]
Message-ID: <170498463788.20080.14469126182221973580.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20231208-uncolored-oxidant-5ab37dd3ab84@spud>
Hello:
This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Fri, 8 Dec 2023 16:06:51 +0000 you wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> There are some extensions that contain numbers, such as Zve32f, which
> are enabled by the "max" cpu type in QEMU.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> [...]
Here is the summary with links:
- [v1] dt-bindings: riscv: permit numbers in "riscv,isa"
https://git.kernel.org/riscv/c/baa04909d100
You are awesome, thank you!
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prev parent reply other threads:[~2024-01-11 14:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 16:06 [PATCH v1] dt-bindings: riscv: permit numbers in "riscv,isa" Conor Dooley
2023-12-08 18:01 ` Krzysztof Kozlowski
2024-01-11 14:50 ` patchwork-bot+linux-riscv [this message]
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