[PATCH v2,RESEND 0/2] drivers: perf: fix crash with the legacy riscv driver

[PATCH v2,RESEND 0/2] drivers: perf: fix crash with the legacy riscv driver

[Vadim Shakirov]

This series fix crash with the legacy riscv driver when configs:
CONFIG_RISCV_PMU_LEGACY=y and CONFIG_RISCV_PMU_SBI=n and you try
to perf record

Vadim Shakirov (2):
  drivers: perf: added capabilities for legacy PMU
  drivers: perf: ctr_get_width function for legacy is not defined

 drivers/perf/riscv_pmu.c        | 18 +++++-------------
 drivers/perf/riscv_pmu_legacy.c | 10 +++++++++-
 2 files changed, 14 insertions(+), 14 deletions(-)

-- 
2.34.1


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[PATCH v2,RESEND 1/2] drivers: perf: added capabilities for legacy PMU

[Vadim Shakirov]

Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
does not provide sampling capabilities

Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
does not provide the ability to disable counter incrementation in
different privilege modes

Suggested-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
---
 drivers/perf/riscv_pmu_legacy.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
index 79fdd667922e..a85fc9a15f03 100644
--- a/drivers/perf/riscv_pmu_legacy.c
+++ b/drivers/perf/riscv_pmu_legacy.c
@@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
 	pmu->event_mapped = pmu_legacy_event_mapped;
 	pmu->event_unmapped = pmu_legacy_event_unmapped;
 	pmu->csr_index = pmu_legacy_csr_index;
+	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
 
 	perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
 }
-- 
2.34.1


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[PATCH v2,RESEND 2/2] drivers: perf: ctr_get_width function for legacy is not defined

[Vadim Shakirov]

With parameters CONFIG_RISCV_PMU_LEGACY=y and CONFIG_RISCV_PMU_SBI=n
linux kernel crashes when you try perf record:

$ perf record ls
[ 46.749286] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[ 46.750199] Oops [#1]
[ 46.750342] Modules linked in:
[ 46.750608] CPU: 0 PID: 107 Comm: perf-exec Not tainted 6.6.0 #2
[ 46.750906] Hardware name: riscv-virtio,qemu (DT)
[ 46.751184] epc : 0x0
[ 46.751430] ra : arch_perf_update_userpage+0x54/0x13e
[ 46.751680] epc : 0000000000000000 ra : ffffffff8072ee52 sp : ff2000000022b8f0
[ 46.751958] gp : ffffffff81505988 tp : ff6000000290d400 t0 : ff2000000022b9c0
[ 46.752229] t1 : 0000000000000001 t2 : 0000000000000003 s0 : ff2000000022b930
[ 46.752451] s1 : ff600000028fb000 a0 : 0000000000000000 a1 : ff600000028fb000
[ 46.752673] a2 : 0000000ae2751268 a3 : 00000000004fb708 a4 : 0000000000000004
[ 46.752895] a5 : 0000000000000000 a6 : 000000000017ffe3 a7 : 00000000000000d2
[ 46.753117] s2 : ff600000028fb000 s3 : 0000000ae2751268 s4 : 0000000000000000
[ 46.753338] s5 : ffffffff8153e290 s6 : ff600000863b9000 s7 : ff60000002961078
[ 46.753562] s8 : ff60000002961048 s9 : ff60000002961058 s10: 0000000000000001
[ 46.753783] s11: 0000000000000018 t3 : ffffffffffffffff t4 : ffffffffffffffff
[ 46.754005] t5 : ff6000000292270c t6 : ff2000000022bb30
[ 46.754179] status: 0000000200000100 badaddr: 0000000000000000 cause: 000000000000000c
[ 46.754653] Code: Unable to access instruction at 0xffffffffffffffec.
[ 46.754939] ---[ end trace 0000000000000000 ]---
[ 46.755131] note: perf-exec[107] exited with irqs disabled
[ 46.755546] note: perf-exec[107] exited with preempt_count 4

This happens because in the legacy case the ctr_get_width function was not
defined, but it is used in arch_perf_update_userpage.

Also remove extra check in riscv_pmu_ctr_get_width_mask

Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 drivers/perf/riscv_pmu.c        | 18 +++++-------------
 drivers/perf/riscv_pmu_legacy.c |  8 +++++++-
 2 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
index 0dda70e1ef90..c78a6fd6c57f 100644
--- a/drivers/perf/riscv_pmu.c
+++ b/drivers/perf/riscv_pmu.c
@@ -150,19 +150,11 @@ u64 riscv_pmu_ctr_get_width_mask(struct perf_event *event)
 	struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu);
 	struct hw_perf_event *hwc = &event->hw;
 
-	if (!rvpmu->ctr_get_width)
-	/**
-	 * If the pmu driver doesn't support counter width, set it to default
-	 * maximum allowed by the specification.
-	 */
-		cwidth = 63;
-	else {
-		if (hwc->idx == -1)
-			/* Handle init case where idx is not initialized yet */
-			cwidth = rvpmu->ctr_get_width(0);
-		else
-			cwidth = rvpmu->ctr_get_width(hwc->idx);
-	}
+	if (hwc->idx == -1)
+		/* Handle init case where idx is not initialized yet */
+		cwidth = rvpmu->ctr_get_width(0);
+	else
+		cwidth = rvpmu->ctr_get_width(hwc->idx);
 
 	return GENMASK_ULL(cwidth, 0);
 }
diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
index a85fc9a15f03..fa0bccf4edf2 100644
--- a/drivers/perf/riscv_pmu_legacy.c
+++ b/drivers/perf/riscv_pmu_legacy.c
@@ -37,6 +37,12 @@ static int pmu_legacy_event_map(struct perf_event *event, u64 *config)
 	return pmu_legacy_ctr_get_idx(event);
 }
 
+/* cycle & instret are always 64 bit, one bit less according to SBI spec */
+static int pmu_legacy_ctr_get_width(int idx)
+{
+	return 63;
+}
+
 static u64 pmu_legacy_read_ctr(struct perf_event *event)
 {
 	struct hw_perf_event *hwc = &event->hw;
@@ -111,7 +117,7 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
 	pmu->ctr_stop = NULL;
 	pmu->event_map = pmu_legacy_event_map;
 	pmu->ctr_get_idx = pmu_legacy_ctr_get_idx;
-	pmu->ctr_get_width = NULL;
+	pmu->ctr_get_width = pmu_legacy_ctr_get_width;
 	pmu->ctr_clear_idx = NULL;
 	pmu->ctr_read = pmu_legacy_read_ctr;
 	pmu->event_mapped = pmu_legacy_event_mapped;
-- 
2.34.1


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Re: [PATCH v2,RESEND 2/2] drivers: perf: ctr_get_width function for legacy is not defined

[Alexandre Ghiti]

Hi Vadim,

On 27/02/2024 18:00, Vadim Shakirov wrote:
> With parameters CONFIG_RISCV_PMU_LEGACY=y and CONFIG_RISCV_PMU_SBI=n
> linux kernel crashes when you try perf record:
>
> $ perf record ls
> [ 46.749286] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
> [ 46.750199] Oops [#1]
> [ 46.750342] Modules linked in:
> [ 46.750608] CPU: 0 PID: 107 Comm: perf-exec Not tainted 6.6.0 #2
> [ 46.750906] Hardware name: riscv-virtio,qemu (DT)
> [ 46.751184] epc : 0x0
> [ 46.751430] ra : arch_perf_update_userpage+0x54/0x13e
> [ 46.751680] epc : 0000000000000000 ra : ffffffff8072ee52 sp : ff2000000022b8f0
> [ 46.751958] gp : ffffffff81505988 tp : ff6000000290d400 t0 : ff2000000022b9c0
> [ 46.752229] t1 : 0000000000000001 t2 : 0000000000000003 s0 : ff2000000022b930
> [ 46.752451] s1 : ff600000028fb000 a0 : 0000000000000000 a1 : ff600000028fb000
> [ 46.752673] a2 : 0000000ae2751268 a3 : 00000000004fb708 a4 : 0000000000000004
> [ 46.752895] a5 : 0000000000000000 a6 : 000000000017ffe3 a7 : 00000000000000d2
> [ 46.753117] s2 : ff600000028fb000 s3 : 0000000ae2751268 s4 : 0000000000000000
> [ 46.753338] s5 : ffffffff8153e290 s6 : ff600000863b9000 s7 : ff60000002961078
> [ 46.753562] s8 : ff60000002961048 s9 : ff60000002961058 s10: 0000000000000001
> [ 46.753783] s11: 0000000000000018 t3 : ffffffffffffffff t4 : ffffffffffffffff
> [ 46.754005] t5 : ff6000000292270c t6 : ff2000000022bb30
> [ 46.754179] status: 0000000200000100 badaddr: 0000000000000000 cause: 000000000000000c
> [ 46.754653] Code: Unable to access instruction at 0xffffffffffffffec.
> [ 46.754939] ---[ end trace 0000000000000000 ]---
> [ 46.755131] note: perf-exec[107] exited with irqs disabled
> [ 46.755546] note: perf-exec[107] exited with preempt_count 4
>
> This happens because in the legacy case the ctr_get_width function was not
> defined, but it is used in arch_perf_update_userpage.
>
> Also remove extra check in riscv_pmu_ctr_get_width_mask
>
> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
> ---
>   drivers/perf/riscv_pmu.c        | 18 +++++-------------
>   drivers/perf/riscv_pmu_legacy.c |  8 +++++++-
>   2 files changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
> index 0dda70e1ef90..c78a6fd6c57f 100644
> --- a/drivers/perf/riscv_pmu.c
> +++ b/drivers/perf/riscv_pmu.c
> @@ -150,19 +150,11 @@ u64 riscv_pmu_ctr_get_width_mask(struct perf_event *event)
>   	struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu);
>   	struct hw_perf_event *hwc = &event->hw;
>   
> -	if (!rvpmu->ctr_get_width)
> -	/**
> -	 * If the pmu driver doesn't support counter width, set it to default
> -	 * maximum allowed by the specification.
> -	 */
> -		cwidth = 63;
> -	else {
> -		if (hwc->idx == -1)
> -			/* Handle init case where idx is not initialized yet */
> -			cwidth = rvpmu->ctr_get_width(0);
> -		else
> -			cwidth = rvpmu->ctr_get_width(hwc->idx);
> -	}
> +	if (hwc->idx == -1)
> +		/* Handle init case where idx is not initialized yet */
> +		cwidth = rvpmu->ctr_get_width(0);
> +	else
> +		cwidth = rvpmu->ctr_get_width(hwc->idx);
>   
>   	return GENMASK_ULL(cwidth, 0);
>   }
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index a85fc9a15f03..fa0bccf4edf2 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -37,6 +37,12 @@ static int pmu_legacy_event_map(struct perf_event *event, u64 *config)
>   	return pmu_legacy_ctr_get_idx(event);
>   }
>   
> +/* cycle & instret are always 64 bit, one bit less according to SBI spec */
> +static int pmu_legacy_ctr_get_width(int idx)
> +{
> +	return 63;
> +}
> +
>   static u64 pmu_legacy_read_ctr(struct perf_event *event)
>   {
>   	struct hw_perf_event *hwc = &event->hw;
> @@ -111,7 +117,7 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>   	pmu->ctr_stop = NULL;
>   	pmu->event_map = pmu_legacy_event_map;
>   	pmu->ctr_get_idx = pmu_legacy_ctr_get_idx;
> -	pmu->ctr_get_width = NULL;
> +	pmu->ctr_get_width = pmu_legacy_ctr_get_width;
>   	pmu->ctr_clear_idx = NULL;
>   	pmu->ctr_read = pmu_legacy_read_ctr;
>   	pmu->event_mapped = pmu_legacy_event_mapped;


Thanks for the resend, this one slipped through...

Let's add the fixes tag:

Fixes: cc4c07c89aad ("drivers: perf: Implement perf event mmap support 
in the SBI backend")

Thanks again,

Alex


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Re: [PATCH v2,RESEND 1/2] drivers: perf: added capabilities for legacy PMU

[Alexandre Ghiti]

On 27/02/2024 18:00, Vadim Shakirov wrote:
> Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
> does not provide sampling capabilities
>
> Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
> does not provide the ability to disable counter incrementation in
> different privilege modes
>
> Suggested-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
> ---
>   drivers/perf/riscv_pmu_legacy.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index 79fdd667922e..a85fc9a15f03 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>   	pmu->event_mapped = pmu_legacy_event_mapped;
>   	pmu->event_unmapped = pmu_legacy_event_unmapped;
>   	pmu->csr_index = pmu_legacy_csr_index;
> +	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
> +	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
>   
>   	perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
>   }


I see here that Atish added its RB: 
https://lore.kernel.org/linux-riscv/CAOnJCUJ-eE+zbXH0yBX_QBK2ep779q=wNCSrc+BJfzUb+zBCaw@mail.gmail.com/

So I add it here (hopefully b4 won't complain, I don't know):

Reviewed-by: Atish Patra <atishp@rivosinc.com>

And I'd say the fixes tag for this one is:

Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V 
legacy perf")

Thanks,

Alex


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Re: [PATCH v2,RESEND 1/2] drivers: perf: added capabilities for legacy PMU

[Alexandre Ghiti]

On 27/02/2024 20:26, Alexandre Ghiti wrote:
> On 27/02/2024 18:00, Vadim Shakirov wrote:
>> Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
>> does not provide sampling capabilities
>>
>> Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
>> does not provide the ability to disable counter incrementation in
>> different privilege modes
>>
>> Suggested-by: Atish Patra <atishp@rivosinc.com>
>> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
>> ---
>>   drivers/perf/riscv_pmu_legacy.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/perf/riscv_pmu_legacy.c 
>> b/drivers/perf/riscv_pmu_legacy.c
>> index 79fdd667922e..a85fc9a15f03 100644
>> --- a/drivers/perf/riscv_pmu_legacy.c
>> +++ b/drivers/perf/riscv_pmu_legacy.c
>> @@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>>       pmu->event_mapped = pmu_legacy_event_mapped;
>>       pmu->event_unmapped = pmu_legacy_event_unmapped;
>>       pmu->csr_index = pmu_legacy_csr_index;
>> +    pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
>> +    pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
>>         perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
>>   }
>
>
> I see here that Atish added its RB: 
> https://lore.kernel.org/linux-riscv/CAOnJCUJ-eE+zbXH0yBX_QBK2ep779q=wNCSrc+BJfzUb+zBCaw@mail.gmail.com/
>
> So I add it here (hopefully b4 won't complain, I don't know):


FTR, b4 indeed complains:

NOTE: some trailers ignored due to from/email mismatches:
     ! Trailer: Reviewed-by: Atish Patra <atishp@rivosinc.com>
      Msg From: Alexandre Ghiti <alex@ghiti.fr>


>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
>
> And I'd say the fixes tag for this one is:
>
> Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V 
> legacy perf")
>
> Thanks,
>
> Alex
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v2,RESEND 1/2] drivers: perf: added capabilities for legacy PMU

[Palmer Dabbelt]

On Tue, 27 Feb 2024 11:26:20 PST (-0800), alex@ghiti.fr wrote:
> On 27/02/2024 18:00, Vadim Shakirov wrote:
>> Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
>> does not provide sampling capabilities
>>
>> Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
>> does not provide the ability to disable counter incrementation in
>> different privilege modes
>>
>> Suggested-by: Atish Patra <atishp@rivosinc.com>
>> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
>> ---
>>   drivers/perf/riscv_pmu_legacy.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
>> index 79fdd667922e..a85fc9a15f03 100644
>> --- a/drivers/perf/riscv_pmu_legacy.c
>> +++ b/drivers/perf/riscv_pmu_legacy.c
>> @@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>>   	pmu->event_mapped = pmu_legacy_event_mapped;
>>   	pmu->event_unmapped = pmu_legacy_event_unmapped;
>>   	pmu->csr_index = pmu_legacy_csr_index;
>> +	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
>> +	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
>>
>>   	perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
>>   }
>
>
> I see here that Atish added its RB:
> https://lore.kernel.org/linux-riscv/CAOnJCUJ-eE+zbXH0yBX_QBK2ep779q=wNCSrc+BJfzUb+zBCaw@mail.gmail.com/
>
> So I add it here (hopefully b4 won't complain, I don't know):
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>

It says

NOTE: some trailers ignored due to from/email mismatches:
    ! Trailer: Reviewed-by: Atish Patra <atishp@rivosinc.com>
     Msg From: Alexandre Ghiti <alex@ghiti.fr>
NOTE: Rerun with -S to apply them anyway

Should show up on fixes in a bit, assuming it gets through the testing.

>
> And I'd say the fixes tag for this one is:
>
> Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V
> legacy perf")
>
> Thanks,
>
> Alex

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Re: [PATCH v2,RESEND 0/2] drivers: perf: fix crash with the legacy riscv driver

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 27 Feb 2024 20:00:00 +0300 you wrote:
> This series fix crash with the legacy riscv driver when configs:
> CONFIG_RISCV_PMU_LEGACY=y and CONFIG_RISCV_PMU_SBI=n and you try
> to perf record
> 
> Vadim Shakirov (2):
>   drivers: perf: added capabilities for legacy PMU
>   drivers: perf: ctr_get_width function for legacy is not defined
> 
> [...]

Here is the summary with links:
  - [v2,RESEND,1/2] drivers: perf: added capabilities for legacy PMU
    https://git.kernel.org/riscv/c/65730fe8f4fb
  - [v2,RESEND,2/2] drivers: perf: ctr_get_width function for legacy is not defined
    https://git.kernel.org/riscv/c/682dc133f83e

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
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