From: patchwork-bot+linux-riscv@kernel.org
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, leobras@redhat.com,
linux-kernel@vger.kernel.org, parri.andrea@gmail.com
Subject: Re: [PATCH -fixes v2] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations
Date: Thu, 30 May 2024 21:10:30 +0000 [thread overview]
Message-ID: <171710343068.6624.13466290859953012929.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20240530145546.394248-1-alexghiti@rivosinc.com>
Hello:
This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Thu, 30 May 2024 16:55:46 +0200 you wrote:
> The fully ordered versions of xchg[8|16]() using LR/SC lack the
> necessary memory barriers to guarantee the order.
>
> Fix this by matching what is already implemented in the fully ordered
> versions of cmpxchg() using LR/SC.
>
> Suggested-by: Andrea Parri <parri.andrea@gmail.com>
> Reported-by: Andrea Parri <parri.andrea@gmail.com>
> Closes: https://lore.kernel.org/linux-riscv/ZlYbupL5XgzgA0MX@andrea/T/#u
> Fixes: a8ed2b7a2c13 ("riscv/cmpxchg: Implement xchg for variables of size 1 and 2")
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
>
> [...]
Here is the summary with links:
- [-fixes,v2] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations
https://git.kernel.org/riscv/c/1d84afaf0252
You are awesome, thank you!
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prev parent reply other threads:[~2024-05-30 21:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-30 14:55 [PATCH -fixes v2] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations Alexandre Ghiti
2024-05-30 15:18 ` Andrea Parri
2024-05-30 21:10 ` patchwork-bot+linux-riscv [this message]
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