From: patchwork-bot+linux-riscv@kernel.org
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, cleger@rivosinc.com,
evan@rivosinc.com, corbet@lwn.net, palmer@rivosinc.com,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
jesse@rivosinc.com, stable@vger.kernel.org,
conor.dooley@microchip.com
Subject: Re: [PATCH v10 0/6] RISC-V: Detect and report speed of unaligned vector accesses
Date: Thu, 24 Oct 2024 17:50:38 +0000 [thread overview]
Message-ID: <172979223826.2327357.18000385603028507418.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241017-jesse_unaligned_vector-v10-0-5b33500160f8@rivosinc.com>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Thu, 17 Oct 2024 12:00:17 -0700 you wrote:
> Adds support for detecting and reporting the speed of unaligned vector
> accesses on RISC-V CPUs. Adds vec_misaligned_speed key to the hwprobe
> adds Zicclsm to cpufeature and fixes the check for scalar unaligned
> emulated all CPUs. The vec_misaligned_speed key keeps the same format
> as the scalar unaligned access speed key.
>
> This set does not emulate unaligned vector accesses on CPUs that do not
> support them. Only reports if userspace can run them and speed of
> unaligned vector accesses if supported.
>
> [...]
Here is the summary with links:
- [v10,1/6] RISC-V: Check scalar unaligned access on all CPUs
https://git.kernel.org/riscv/c/8d20a739f17a
- [v10,2/6] RISC-V: Scalar unaligned access emulated on hotplug CPUs
https://git.kernel.org/riscv/c/9c528b5f7927
- [v10,3/6] RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNED
https://git.kernel.org/riscv/c/c05a62c92516
- [v10,4/6] RISC-V: Detect unaligned vector accesses supported
https://git.kernel.org/riscv/c/d1703dc7bc8e
- [v10,5/6] RISC-V: Report vector unaligned access speed hwprobe
https://git.kernel.org/riscv/c/e7c9d66e313b
- [v10,6/6] RISC-V: hwprobe: Document unaligned vector perf key
https://git.kernel.org/riscv/c/40e09ebd791f
You are awesome, thank you!
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prev parent reply other threads:[~2024-10-24 18:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-17 19:00 [PATCH v10 0/6] RISC-V: Detect and report speed of unaligned vector accesses Charlie Jenkins
2024-10-17 19:00 ` [PATCH v10 1/6] RISC-V: Check scalar unaligned access on all CPUs Charlie Jenkins
2024-10-17 19:00 ` [PATCH v10 2/6] RISC-V: Scalar unaligned access emulated on hotplug CPUs Charlie Jenkins
2024-10-17 19:00 ` [PATCH v10 3/6] RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNED Charlie Jenkins
2024-10-17 19:00 ` [PATCH v10 4/6] RISC-V: Detect unaligned vector accesses supported Charlie Jenkins
2024-10-18 23:48 ` Jesse T
2024-10-17 19:00 ` [PATCH v10 5/6] RISC-V: Report vector unaligned access speed hwprobe Charlie Jenkins
2024-10-17 19:00 ` [PATCH v10 6/6] RISC-V: hwprobe: Document unaligned vector perf key Charlie Jenkins
2024-10-24 17:50 ` patchwork-bot+linux-riscv [this message]
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