* [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
@ 2025-05-09 8:28 Alexandre Ghiti
2025-05-13 19:49 ` Alexandre Ghiti
0 siblings, 1 reply; 8+ messages in thread
From: Alexandre Ghiti @ 2025-05-09 8:28 UTC (permalink / raw)
To: Palmer Dabbelt, linux-riscv@lists.infradead.org
The following changes since commit 9c32cda43eb78f78c73aee4aa344b777714e259b:
Linux 6.15-rc3 (2025-04-20 13:43:47 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux
tags/riscv-mw1-6.16-rc1
for you to fetch changes up to 135452d0c6114619fb954eaf9496210b5be0701d:
riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE (2025-05-09
06:35:10 +0000)
----------------------------------------------------------------
riscv patches for 6.16-rc1
* Implement atomic patching support for ftrace which finally allows to
get rid of stop_machine()
* Support for user_access_begin() to avoid toggling the SUM bit at each
userspace access, improving the performance of our user copies
* Support for kexec_file_load() syscall
* Improve module loading time by changing the algorithm that counts the
number of plt/got entries in a module
* Zicbop is now used in the kernel to prefetch instructions
----------------------------------------------------------------
Alexandre Ghiti (8):
riscv: Add support for PUD THP
Merge patch series "riscv: uaccess: optimisations"
riscv: Introduce Zicbop instructions
riscv: Add support for Zicbop
Merge patch series "riscv: ftrace: atmoic patching and preempt
improvements"
Merge patch series "riscv: kexec_file: Support loading Image
binary file"
riscv: hwprobe: export Zabha extension
Merge patch series "riscv: Add Zicbop & prefetchw support"
Andy Chiu (11):
riscv: ftrace: support fastcc in Clang for WITH_ARGS
riscv: ftrace factor out code defined by !WITH_ARG
riscv: ftrace: align patchable functions to 4 Byte boundary
kernel: ftrace: export ftrace_sync_ipi
riscv: ftrace: prepare ftrace for atomic code patching
riscv: ftrace: do not use stop_machine to update code
riscv: vector: Support calling schedule() for preemptible Vector
riscv: add a data fence for CMODX in the kernel mode
riscv: ftrace: support PREEMPT
riscv: ftrace: support direct call using call_ops
riscv: Documentation: add a description about dynamic ftrace
Atish Patra (1):
MAINTAINERS: Update Atish's email address
Ben Dooks (1):
riscv: save the SR_SUM status over switches
Guo Ren (2):
riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
riscv: xchg: Prefetch the destination word for sc.w
Haibo Xu (1):
perf symbols: Ignore mapping symbols on riscv
Jisheng Zhang (4):
riscv: implement user_access_begin() and families
riscv: uaccess: use input constraints for ptr of __put_user()
riscv: uaccess: use 'asm goto' for put_user()
riscv: uaccess: use 'asm_goto_output' for get_user()
Miquel Sabaté Solà (1):
riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
Puranjay Mohan (1):
riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
Samuel Holland (1):
riscv: module: Optimize PLT/GOT entry counting
Song Shuai (2):
riscv: kexec_file: Split the loading of kernel and others
riscv: kexec_file: Support loading Image binary file
Tiezhu Yang (1):
riscv: Make regs_irqs_disabled() more clear
Yao Zi (1):
riscv/kexec_file: Fix comment in purgatory relocator
谢致邦 (XIE Zhibang) (1):
RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
.mailmap | 3 +-
Documentation/arch/riscv/cmodx.rst | 46 +++-
Documentation/arch/riscv/hwprobe.rst | 4 +
MAINTAINERS | 4 +-
arch/riscv/Kconfig | 36 ++-
arch/riscv/Makefile | 4 +-
arch/riscv/include/asm/barrier.h | 5 -
arch/riscv/include/asm/cacheflush.h | 1 +
arch/riscv/include/asm/cmpxchg.h | 4 +-
arch/riscv/include/asm/ftrace.h | 62 ++---
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/asm/image.h | 2 +
arch/riscv/include/asm/insn-def.h | 66 ++++++
arch/riscv/include/asm/kexec.h | 6 +
arch/riscv/include/asm/pgtable-64.h | 5 +-
arch/riscv/include/asm/pgtable.h | 97 ++++++++
arch/riscv/include/asm/processor.h | 31 ++-
arch/riscv/include/asm/ptrace.h | 2 +-
arch/riscv/include/asm/tlbflush.h | 2 +
arch/riscv/include/asm/uaccess.h | 218 ++++++++++++-----
arch/riscv/include/asm/vector.h | 22 +-
arch/riscv/include/uapi/asm/hwprobe.h | 1 +
arch/riscv/kernel/Makefile | 2 +-
arch/riscv/kernel/asm-offsets.c | 18 ++
arch/riscv/kernel/cpufeature.c | 21 ++
arch/riscv/kernel/elf_kexec.c | 485
--------------------------------------
arch/riscv/kernel/entry.S | 8 +
arch/riscv/kernel/ftrace.c | 242 ++++++++++---------
arch/riscv/kernel/kexec_elf.c | 144 +++++++++++
arch/riscv/kernel/kexec_image.c | 96 ++++++++
arch/riscv/kernel/machine_kexec_file.c | 361 ++++++++++++++++++++++++++++
arch/riscv/kernel/mcount-dyn.S | 117 +++++----
arch/riscv/kernel/module-sections.c | 81 +++++--
arch/riscv/kernel/sys_hwprobe.c | 1 +
arch/riscv/mm/cacheflush.c | 29 ++-
arch/riscv/mm/pgtable.c | 10 +
arch/riscv/mm/tlbflush.c | 7 +
include/linux/ftrace.h | 2 +
kernel/trace/ftrace.c | 2 +-
tools/perf/util/symbol-elf.c | 6 +
40 files changed, 1470 insertions(+), 784 deletions(-)
delete mode 100644 arch/riscv/kernel/elf_kexec.c
create mode 100644 arch/riscv/kernel/kexec_elf.c
create mode 100644 arch/riscv/kernel/kexec_image.c
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-05-09 8:28 Alexandre Ghiti
@ 2025-05-13 19:49 ` Alexandre Ghiti
2025-05-29 15:26 ` Palmer Dabbelt
0 siblings, 1 reply; 8+ messages in thread
From: Alexandre Ghiti @ 2025-05-13 19:49 UTC (permalink / raw)
To: Palmer Dabbelt, linux-riscv@lists.infradead.org
Hi Palmer,
On 09/05/2025 10:28, Alexandre Ghiti wrote:
> The following changes since commit
> 9c32cda43eb78f78c73aee4aa344b777714e259b:
>
> Linux 6.15-rc3 (2025-04-20 13:43:47 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux
> tags/riscv-mw1-6.16-rc1
>
> for you to fetch changes up to 135452d0c6114619fb954eaf9496210b5be0701d:
>
> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE (2025-05-09
> 06:35:10 +0000)
>
> ----------------------------------------------------------------
> riscv patches for 6.16-rc1
>
> * Implement atomic patching support for ftrace which finally allows to
> get rid of stop_machine()
> * Support for user_access_begin() to avoid toggling the SUM bit at
> each userspace access, improving the performance of our user copies
> * Support for kexec_file_load() syscall
> * Improve module loading time by changing the algorithm that counts
> the number of plt/got entries in a module
> * Zicbop is now used in the kernel to prefetch instructions
>
> ----------------------------------------------------------------
> Alexandre Ghiti (8):
> riscv: Add support for PUD THP
> Merge patch series "riscv: uaccess: optimisations"
> riscv: Introduce Zicbop instructions
> riscv: Add support for Zicbop
> Merge patch series "riscv: ftrace: atmoic patching and preempt
> improvements"
> Merge patch series "riscv: kexec_file: Support loading Image
> binary file"
> riscv: hwprobe: export Zabha extension
> Merge patch series "riscv: Add Zicbop & prefetchw support"
>
> Andy Chiu (11):
> riscv: ftrace: support fastcc in Clang for WITH_ARGS
> riscv: ftrace factor out code defined by !WITH_ARG
> riscv: ftrace: align patchable functions to 4 Byte boundary
> kernel: ftrace: export ftrace_sync_ipi
> riscv: ftrace: prepare ftrace for atomic code patching
> riscv: ftrace: do not use stop_machine to update code
> riscv: vector: Support calling schedule() for preemptible Vector
> riscv: add a data fence for CMODX in the kernel mode
> riscv: ftrace: support PREEMPT
> riscv: ftrace: support direct call using call_ops
> riscv: Documentation: add a description about dynamic ftrace
>
> Atish Patra (1):
> MAINTAINERS: Update Atish's email address
>
> Ben Dooks (1):
> riscv: save the SR_SUM status over switches
>
> Guo Ren (2):
> riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
> riscv: xchg: Prefetch the destination word for sc.w
>
> Haibo Xu (1):
> perf symbols: Ignore mapping symbols on riscv
>
> Jisheng Zhang (4):
> riscv: implement user_access_begin() and families
> riscv: uaccess: use input constraints for ptr of __put_user()
> riscv: uaccess: use 'asm goto' for put_user()
> riscv: uaccess: use 'asm_goto_output' for get_user()
>
> Miquel Sabaté Solà (1):
> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
>
> Puranjay Mohan (1):
> riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
>
> Samuel Holland (1):
> riscv: module: Optimize PLT/GOT entry counting
>
> Song Shuai (2):
> riscv: kexec_file: Split the loading of kernel and others
> riscv: kexec_file: Support loading Image binary file
>
> Tiezhu Yang (1):
> riscv: Make regs_irqs_disabled() more clear
>
> Yao Zi (1):
> riscv/kexec_file: Fix comment in purgatory relocator
>
> 谢致邦 (XIE Zhibang) (1):
> RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
>
> .mailmap | 3 +-
> Documentation/arch/riscv/cmodx.rst | 46 +++-
> Documentation/arch/riscv/hwprobe.rst | 4 +
> MAINTAINERS | 4 +-
> arch/riscv/Kconfig | 36 ++-
> arch/riscv/Makefile | 4 +-
> arch/riscv/include/asm/barrier.h | 5 -
> arch/riscv/include/asm/cacheflush.h | 1 +
> arch/riscv/include/asm/cmpxchg.h | 4 +-
> arch/riscv/include/asm/ftrace.h | 62 ++---
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/include/asm/image.h | 2 +
> arch/riscv/include/asm/insn-def.h | 66 ++++++
> arch/riscv/include/asm/kexec.h | 6 +
> arch/riscv/include/asm/pgtable-64.h | 5 +-
> arch/riscv/include/asm/pgtable.h | 97 ++++++++
> arch/riscv/include/asm/processor.h | 31 ++-
> arch/riscv/include/asm/ptrace.h | 2 +-
> arch/riscv/include/asm/tlbflush.h | 2 +
> arch/riscv/include/asm/uaccess.h | 218 ++++++++++++-----
> arch/riscv/include/asm/vector.h | 22 +-
> arch/riscv/include/uapi/asm/hwprobe.h | 1 +
> arch/riscv/kernel/Makefile | 2 +-
> arch/riscv/kernel/asm-offsets.c | 18 ++
> arch/riscv/kernel/cpufeature.c | 21 ++
> arch/riscv/kernel/elf_kexec.c | 485
> --------------------------------------
> arch/riscv/kernel/entry.S | 8 +
> arch/riscv/kernel/ftrace.c | 242 ++++++++++---------
> arch/riscv/kernel/kexec_elf.c | 144 +++++++++++
> arch/riscv/kernel/kexec_image.c | 96 ++++++++
> arch/riscv/kernel/machine_kexec_file.c | 361
> ++++++++++++++++++++++++++++
> arch/riscv/kernel/mcount-dyn.S | 117 +++++----
> arch/riscv/kernel/module-sections.c | 81 +++++--
> arch/riscv/kernel/sys_hwprobe.c | 1 +
> arch/riscv/mm/cacheflush.c | 29 ++-
> arch/riscv/mm/pgtable.c | 10 +
> arch/riscv/mm/tlbflush.c | 7 +
> include/linux/ftrace.h | 2 +
> kernel/trace/ftrace.c | 2 +-
> tools/perf/util/symbol-elf.c | 6 +
> 40 files changed, 1470 insertions(+), 784 deletions(-)
> delete mode 100644 arch/riscv/kernel/elf_kexec.c
> create mode 100644 arch/riscv/kernel/kexec_elf.c
> create mode 100644 arch/riscv/kernel/kexec_image.c
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
kernel test robot reported warnings
(https://lore.kernel.org/oe-kbuild-all/202505122357.aPWWHCbX-lkp@intel.com/)
that the following diff fixes, can you squash that into commit ("riscv:
uaccess: use 'asm_goto_output' for get_user()")?
diff --git a/arch/riscv/include/asm/uaccess.h
b/arch/riscv/include/asm/uaccess.h
index 87d01168f80af..76c278dd2439f 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -127,6 +127,7 @@ do { \
#ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
#define __get_user_8(x, ptr, label) \
+do { \
u32 __user *__ptr = (u32 __user *)(ptr); \
u32 __lo, __hi; \
asm_goto_output( \
@@ -141,7 +142,7 @@ do { \
: : label); \
(x) = (__typeof__(x))((__typeof__((x) - (x)))( \
(((u64)__hi << 32) | __lo))); \
-
+} while (0)
#else /* !CONFIG_CC_HAS_ASM_GOTO_OUTPUT */
#define __get_user_8(x, ptr, label) \
do { \
Thanks,
Alex
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-05-13 19:49 ` Alexandre Ghiti
@ 2025-05-29 15:26 ` Palmer Dabbelt
2025-05-30 5:48 ` Alexandre Ghiti
0 siblings, 1 reply; 8+ messages in thread
From: Palmer Dabbelt @ 2025-05-29 15:26 UTC (permalink / raw)
To: alex; +Cc: linux-riscv
On Tue, 13 May 2025 12:49:26 PDT (-0700), alex@ghiti.fr wrote:
> Hi Palmer,
>
> On 09/05/2025 10:28, Alexandre Ghiti wrote:
>> The following changes since commit
>> 9c32cda43eb78f78c73aee4aa344b777714e259b:
>>
>> Linux 6.15-rc3 (2025-04-20 13:43:47 -0700)
>>
>> are available in the Git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux
>> tags/riscv-mw1-6.16-rc1
>>
>> for you to fetch changes up to 135452d0c6114619fb954eaf9496210b5be0701d:
>>
>> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE (2025-05-09
>> 06:35:10 +0000)
>>
>> ----------------------------------------------------------------
>> riscv patches for 6.16-rc1
>>
>> * Implement atomic patching support for ftrace which finally allows to
>> get rid of stop_machine()
>> * Support for user_access_begin() to avoid toggling the SUM bit at
>> each userspace access, improving the performance of our user copies
>> * Support for kexec_file_load() syscall
>> * Improve module loading time by changing the algorithm that counts
>> the number of plt/got entries in a module
>> * Zicbop is now used in the kernel to prefetch instructions
>>
>> ----------------------------------------------------------------
>> Alexandre Ghiti (8):
>> riscv: Add support for PUD THP
>> Merge patch series "riscv: uaccess: optimisations"
>> riscv: Introduce Zicbop instructions
>> riscv: Add support for Zicbop
>> Merge patch series "riscv: ftrace: atmoic patching and preempt
>> improvements"
>> Merge patch series "riscv: kexec_file: Support loading Image
>> binary file"
>> riscv: hwprobe: export Zabha extension
>> Merge patch series "riscv: Add Zicbop & prefetchw support"
>>
>> Andy Chiu (11):
>> riscv: ftrace: support fastcc in Clang for WITH_ARGS
>> riscv: ftrace factor out code defined by !WITH_ARG
>> riscv: ftrace: align patchable functions to 4 Byte boundary
>> kernel: ftrace: export ftrace_sync_ipi
>> riscv: ftrace: prepare ftrace for atomic code patching
>> riscv: ftrace: do not use stop_machine to update code
>> riscv: vector: Support calling schedule() for preemptible Vector
>> riscv: add a data fence for CMODX in the kernel mode
>> riscv: ftrace: support PREEMPT
>> riscv: ftrace: support direct call using call_ops
>> riscv: Documentation: add a description about dynamic ftrace
>>
>> Atish Patra (1):
>> MAINTAINERS: Update Atish's email address
>>
>> Ben Dooks (1):
>> riscv: save the SR_SUM status over switches
>>
>> Guo Ren (2):
>> riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
>> riscv: xchg: Prefetch the destination word for sc.w
>>
>> Haibo Xu (1):
>> perf symbols: Ignore mapping symbols on riscv
>>
>> Jisheng Zhang (4):
>> riscv: implement user_access_begin() and families
>> riscv: uaccess: use input constraints for ptr of __put_user()
>> riscv: uaccess: use 'asm goto' for put_user()
>> riscv: uaccess: use 'asm_goto_output' for get_user()
>>
>> Miquel Sabaté Solà (1):
>> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
>>
>> Puranjay Mohan (1):
>> riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
>>
>> Samuel Holland (1):
>> riscv: module: Optimize PLT/GOT entry counting
>>
>> Song Shuai (2):
>> riscv: kexec_file: Split the loading of kernel and others
>> riscv: kexec_file: Support loading Image binary file
>>
>> Tiezhu Yang (1):
>> riscv: Make regs_irqs_disabled() more clear
>>
>> Yao Zi (1):
>> riscv/kexec_file: Fix comment in purgatory relocator
>>
>> 谢致邦 (XIE Zhibang) (1):
>> RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
>>
>> .mailmap | 3 +-
>> Documentation/arch/riscv/cmodx.rst | 46 +++-
>> Documentation/arch/riscv/hwprobe.rst | 4 +
>> MAINTAINERS | 4 +-
>> arch/riscv/Kconfig | 36 ++-
>> arch/riscv/Makefile | 4 +-
>> arch/riscv/include/asm/barrier.h | 5 -
>> arch/riscv/include/asm/cacheflush.h | 1 +
>> arch/riscv/include/asm/cmpxchg.h | 4 +-
>> arch/riscv/include/asm/ftrace.h | 62 ++---
>> arch/riscv/include/asm/hwcap.h | 1 +
>> arch/riscv/include/asm/image.h | 2 +
>> arch/riscv/include/asm/insn-def.h | 66 ++++++
>> arch/riscv/include/asm/kexec.h | 6 +
>> arch/riscv/include/asm/pgtable-64.h | 5 +-
>> arch/riscv/include/asm/pgtable.h | 97 ++++++++
>> arch/riscv/include/asm/processor.h | 31 ++-
>> arch/riscv/include/asm/ptrace.h | 2 +-
>> arch/riscv/include/asm/tlbflush.h | 2 +
>> arch/riscv/include/asm/uaccess.h | 218 ++++++++++++-----
>> arch/riscv/include/asm/vector.h | 22 +-
>> arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>> arch/riscv/kernel/Makefile | 2 +-
>> arch/riscv/kernel/asm-offsets.c | 18 ++
>> arch/riscv/kernel/cpufeature.c | 21 ++
>> arch/riscv/kernel/elf_kexec.c | 485
>> --------------------------------------
>> arch/riscv/kernel/entry.S | 8 +
>> arch/riscv/kernel/ftrace.c | 242 ++++++++++---------
>> arch/riscv/kernel/kexec_elf.c | 144 +++++++++++
>> arch/riscv/kernel/kexec_image.c | 96 ++++++++
>> arch/riscv/kernel/machine_kexec_file.c | 361
>> ++++++++++++++++++++++++++++
>> arch/riscv/kernel/mcount-dyn.S | 117 +++++----
>> arch/riscv/kernel/module-sections.c | 81 +++++--
>> arch/riscv/kernel/sys_hwprobe.c | 1 +
>> arch/riscv/mm/cacheflush.c | 29 ++-
>> arch/riscv/mm/pgtable.c | 10 +
>> arch/riscv/mm/tlbflush.c | 7 +
>> include/linux/ftrace.h | 2 +
>> kernel/trace/ftrace.c | 2 +-
>> tools/perf/util/symbol-elf.c | 6 +
>> 40 files changed, 1470 insertions(+), 784 deletions(-)
>> delete mode 100644 arch/riscv/kernel/elf_kexec.c
>> create mode 100644 arch/riscv/kernel/kexec_elf.c
>> create mode 100644 arch/riscv/kernel/kexec_image.c
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
> kernel test robot reported warnings
> (https://lore.kernel.org/oe-kbuild-all/202505122357.aPWWHCbX-lkp@intel.com/)
> that the following diff fixes, can you squash that into commit ("riscv:
> uaccess: use 'asm_goto_output' for get_user()")?
>
> diff --git a/arch/riscv/include/asm/uaccess.h
> b/arch/riscv/include/asm/uaccess.h
> index 87d01168f80af..76c278dd2439f 100644
> --- a/arch/riscv/include/asm/uaccess.h
> +++ b/arch/riscv/include/asm/uaccess.h
> @@ -127,6 +127,7 @@ do { \
>
> #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
> #define __get_user_8(x, ptr, label) \
> +do { \
> u32 __user *__ptr = (u32 __user *)(ptr); \
> u32 __lo, __hi; \
> asm_goto_output( \
> @@ -141,7 +142,7 @@ do { \
> : : label); \
> (x) = (__typeof__(x))((__typeof__((x) - (x)))( \
> (((u64)__hi << 32) | __lo))); \
> -
> +} while (0)
> #else /* !CONFIG_CC_HAS_ASM_GOTO_OUTPUT */
> #define __get_user_8(x, ptr, label) \
> do { \
I did, but I'm getting a PLT in my VDSO. A rebase is pointing to my
merge, so not sure if I just screwed something up with the "git rebase
-ir" or if something else is broken...
>
>
> Thanks,
>
> Alex
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-05-29 15:26 ` Palmer Dabbelt
@ 2025-05-30 5:48 ` Alexandre Ghiti
0 siblings, 0 replies; 8+ messages in thread
From: Alexandre Ghiti @ 2025-05-30 5:48 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: linux-riscv
On 5/29/25 17:26, Palmer Dabbelt wrote:
> On Tue, 13 May 2025 12:49:26 PDT (-0700), alex@ghiti.fr wrote:
>> Hi Palmer,
>>
>> On 09/05/2025 10:28, Alexandre Ghiti wrote:
>>> The following changes since commit
>>> 9c32cda43eb78f78c73aee4aa344b777714e259b:
>>>
>>> Linux 6.15-rc3 (2025-04-20 13:43:47 -0700)
>>>
>>> are available in the Git repository at:
>>>
>>> git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux
>>> tags/riscv-mw1-6.16-rc1
>>>
>>> for you to fetch changes up to
>>> 135452d0c6114619fb954eaf9496210b5be0701d:
>>>
>>> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE (2025-05-09
>>> 06:35:10 +0000)
>>>
>>> ----------------------------------------------------------------
>>> riscv patches for 6.16-rc1
>>>
>>> * Implement atomic patching support for ftrace which finally allows
>>> to get rid of stop_machine()
>>> * Support for user_access_begin() to avoid toggling the SUM bit at
>>> each userspace access, improving the performance of our user copies
>>> * Support for kexec_file_load() syscall
>>> * Improve module loading time by changing the algorithm that counts
>>> the number of plt/got entries in a module
>>> * Zicbop is now used in the kernel to prefetch instructions
>>>
>>> ----------------------------------------------------------------
>>> Alexandre Ghiti (8):
>>> riscv: Add support for PUD THP
>>> Merge patch series "riscv: uaccess: optimisations"
>>> riscv: Introduce Zicbop instructions
>>> riscv: Add support for Zicbop
>>> Merge patch series "riscv: ftrace: atmoic patching and preempt
>>> improvements"
>>> Merge patch series "riscv: kexec_file: Support loading Image
>>> binary file"
>>> riscv: hwprobe: export Zabha extension
>>> Merge patch series "riscv: Add Zicbop & prefetchw support"
>>>
>>> Andy Chiu (11):
>>> riscv: ftrace: support fastcc in Clang for WITH_ARGS
>>> riscv: ftrace factor out code defined by !WITH_ARG
>>> riscv: ftrace: align patchable functions to 4 Byte boundary
>>> kernel: ftrace: export ftrace_sync_ipi
>>> riscv: ftrace: prepare ftrace for atomic code patching
>>> riscv: ftrace: do not use stop_machine to update code
>>> riscv: vector: Support calling schedule() for preemptible Vector
>>> riscv: add a data fence for CMODX in the kernel mode
>>> riscv: ftrace: support PREEMPT
>>> riscv: ftrace: support direct call using call_ops
>>> riscv: Documentation: add a description about dynamic ftrace
>>>
>>> Atish Patra (1):
>>> MAINTAINERS: Update Atish's email address
>>>
>>> Ben Dooks (1):
>>> riscv: save the SR_SUM status over switches
>>>
>>> Guo Ren (2):
>>> riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
>>> riscv: xchg: Prefetch the destination word for sc.w
>>>
>>> Haibo Xu (1):
>>> perf symbols: Ignore mapping symbols on riscv
>>>
>>> Jisheng Zhang (4):
>>> riscv: implement user_access_begin() and families
>>> riscv: uaccess: use input constraints for ptr of __put_user()
>>> riscv: uaccess: use 'asm goto' for put_user()
>>> riscv: uaccess: use 'asm_goto_output' for get_user()
>>>
>>> Miquel Sabaté Solà (1):
>>> riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
>>>
>>> Puranjay Mohan (1):
>>> riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
>>>
>>> Samuel Holland (1):
>>> riscv: module: Optimize PLT/GOT entry counting
>>>
>>> Song Shuai (2):
>>> riscv: kexec_file: Split the loading of kernel and others
>>> riscv: kexec_file: Support loading Image binary file
>>>
>>> Tiezhu Yang (1):
>>> riscv: Make regs_irqs_disabled() more clear
>>>
>>> Yao Zi (1):
>>> riscv/kexec_file: Fix comment in purgatory relocator
>>>
>>> 谢致邦 (XIE Zhibang) (1):
>>> RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
>>>
>>> .mailmap | 3 +-
>>> Documentation/arch/riscv/cmodx.rst | 46 +++-
>>> Documentation/arch/riscv/hwprobe.rst | 4 +
>>> MAINTAINERS | 4 +-
>>> arch/riscv/Kconfig | 36 ++-
>>> arch/riscv/Makefile | 4 +-
>>> arch/riscv/include/asm/barrier.h | 5 -
>>> arch/riscv/include/asm/cacheflush.h | 1 +
>>> arch/riscv/include/asm/cmpxchg.h | 4 +-
>>> arch/riscv/include/asm/ftrace.h | 62 ++---
>>> arch/riscv/include/asm/hwcap.h | 1 +
>>> arch/riscv/include/asm/image.h | 2 +
>>> arch/riscv/include/asm/insn-def.h | 66 ++++++
>>> arch/riscv/include/asm/kexec.h | 6 +
>>> arch/riscv/include/asm/pgtable-64.h | 5 +-
>>> arch/riscv/include/asm/pgtable.h | 97 ++++++++
>>> arch/riscv/include/asm/processor.h | 31 ++-
>>> arch/riscv/include/asm/ptrace.h | 2 +-
>>> arch/riscv/include/asm/tlbflush.h | 2 +
>>> arch/riscv/include/asm/uaccess.h | 218 ++++++++++++-----
>>> arch/riscv/include/asm/vector.h | 22 +-
>>> arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>>> arch/riscv/kernel/Makefile | 2 +-
>>> arch/riscv/kernel/asm-offsets.c | 18 ++
>>> arch/riscv/kernel/cpufeature.c | 21 ++
>>> arch/riscv/kernel/elf_kexec.c | 485
>>> --------------------------------------
>>> arch/riscv/kernel/entry.S | 8 +
>>> arch/riscv/kernel/ftrace.c | 242 ++++++++++---------
>>> arch/riscv/kernel/kexec_elf.c | 144 +++++++++++
>>> arch/riscv/kernel/kexec_image.c | 96 ++++++++
>>> arch/riscv/kernel/machine_kexec_file.c | 361
>>> ++++++++++++++++++++++++++++
>>> arch/riscv/kernel/mcount-dyn.S | 117 +++++----
>>> arch/riscv/kernel/module-sections.c | 81 +++++--
>>> arch/riscv/kernel/sys_hwprobe.c | 1 +
>>> arch/riscv/mm/cacheflush.c | 29 ++-
>>> arch/riscv/mm/pgtable.c | 10 +
>>> arch/riscv/mm/tlbflush.c | 7 +
>>> include/linux/ftrace.h | 2 +
>>> kernel/trace/ftrace.c | 2 +-
>>> tools/perf/util/symbol-elf.c | 6 +
>>> 40 files changed, 1470 insertions(+), 784 deletions(-)
>>> delete mode 100644 arch/riscv/kernel/elf_kexec.c
>>> create mode 100644 arch/riscv/kernel/kexec_elf.c
>>> create mode 100644 arch/riscv/kernel/kexec_image.c
>>>
>>>
>>> _______________________________________________
>>> linux-riscv mailing list
>>> linux-riscv@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>>
>> kernel test robot reported warnings
>> (https://lore.kernel.org/oe-kbuild-all/202505122357.aPWWHCbX-lkp@intel.com/)
>> that the following diff fixes, can you squash that into commit
>> ("riscv: uaccess: use 'asm_goto_output' for get_user()")?
>>
>> diff --git a/arch/riscv/include/asm/uaccess.h
>> b/arch/riscv/include/asm/uaccess.h
>> index 87d01168f80af..76c278dd2439f 100644
>> --- a/arch/riscv/include/asm/uaccess.h
>> +++ b/arch/riscv/include/asm/uaccess.h
>> @@ -127,6 +127,7 @@ do { \
>>
>> #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
>> #define __get_user_8(x, ptr, label) \
>> +do { \
>> u32 __user *__ptr = (u32 __user *)(ptr); \
>> u32 __lo, __hi; \
>> asm_goto_output( \
>> @@ -141,7 +142,7 @@ do { \
>> : : label); \
>> (x) = (__typeof__(x))((__typeof__((x) - (x)))( \
>> (((u64)__hi << 32) | __lo))); \
>> -
>> +} while (0)
>> #else /* !CONFIG_CC_HAS_ASM_GOTO_OUTPUT */
>> #define __get_user_8(x, ptr, label) \
>> do { \
>
> I did, but I'm getting a PLT in my VDSO. A rebase is pointing to my
> merge, so not sure if I just screwed something up with the "git rebase
> -ir" or if something else is broken...
That's because you somehow have this commit in your branch "RISC-V:
vDSO: Wire up getrandom() vDSO implementation". I sent a fixed version
of this patch in the second PR.
Thanks,
Alex
>>
>>
>> Thanks,
>>
>> Alex
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
@ 2025-06-06 18:10 Palmer Dabbelt
2025-06-07 1:18 ` pr-tracker-bot
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Palmer Dabbelt @ 2025-06-06 18:10 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-riscv, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 12813 bytes --]
The following changes since commit 82f2b0b97b36ee3fcddf0f0780a9a0825d52fec3:
Linux 6.15-rc6 (2025-05-11 14:54:11 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.16-mw1
for you to fetch changes up to 51f1b16367dfde89a4ef5bee2270f6a4d523ef3b:
Merge patch series "riscv: add SBI FWFT misaligned exception delegation support" (2025-06-05 14:03:19 -0700)
----------------------------------------------------------------
RISC-V Patches for the 6.16 Merge Window, Part 1
* Support for the FWFT SBI extension, which is part of SBI 3.0 and a
dependency for many new SBI and ISA extensions.
* Support for getrandom() in the VDSO.
* Support for mseal.
* Optimized routines for raid6 syndrome and recovery calculations.
* kexec_file() supports loading Image-formatted kernel binaries.
* Improvements to the instruction patching framework to allow for atomic
instruction patching, along with rules as to how systems need to
behave in order to function correctly.
* Support for a handful of new ISA extensions: Svinval, Zicbop, Zabha,
some SiFive vendor extensions.
* Various fixes and cleanups, including: misaligned access handling, perf
symbol mangling, module loading, PUD THPs, and improved uaccess
routines.
----------------------------------------------------------------
I don't plan on sending a part 2, it's way too late already.
Apologies in advance if something has gone off the rails here: between changing
jobs and some tree-related chaos there's been a lot of git surgery here. I
poked around and think I managed to get things sane, but I've screwed that up
in the past.
The tests are all clean on my end for this one, both pre and post merge, and I
don't have anything from the bots overnight.
----------------------------------------------------------------
Alexandre Ghiti (7):
riscv: Introduce Zicbop instructions
riscv: Add support for Zicbop
riscv: Add support for PUD THP
Merge patch series "riscv: ftrace: atmoic patching and preempt improvements"
riscv: hwprobe: export Zabha extension
riscv: make unsafe user copy routines use existing assembly routines
Merge patch series "riscv: Add Zicbop & prefetchw support"
Andy Chiu (11):
riscv: ftrace: support fastcc in Clang for WITH_ARGS
riscv: ftrace factor out code defined by !WITH_ARG
riscv: ftrace: align patchable functions to 4 Byte boundary
kernel: ftrace: export ftrace_sync_ipi
riscv: ftrace: prepare ftrace for atomic code patching
riscv: ftrace: do not use stop_machine to update code
riscv: vector: Support calling schedule() for preemptible Vector
riscv: add a data fence for CMODX in the kernel mode
riscv: ftrace: support PREEMPT
riscv: ftrace: support direct call using call_ops
riscv: Documentation: add a description about dynamic ftrace
Atish Patra (1):
MAINTAINERS: Update Atish's email address
Ben Dooks (1):
riscv: save the SR_SUM status over switches
Chunyan Zhang (1):
raid6: Add RISC-V SIMD syndrome and recovery calculations
Clément Léger (12):
riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions
riscv: sbi: remove useless parenthesis
riscv: sbi: add new SBI error mappings
riscv: sbi: add FWFT extension interface
riscv: sbi: add SBI FWFT extension calls
riscv: misaligned: request misaligned exception from SBI
riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED
riscv: misaligned: move emulated access uniformity check in a function
riscv: misaligned: add a function to check misalign trap delegability
riscv: process: use unsigned int instead of unsigned long for put_user()
riscv: uaccess: do not do misaligned accesses in get/put_user()
Cyan Yang (12):
dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description
riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
riscv: hwprobe: Document SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq
dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description
riscv: Add SiFive xsfvfnrclipxfqf vendor extension
riscv: hwprobe: Document SiFive xsfvfnrclipxfqf vendor extension
riscv: hwprobe: Add SiFive xsfvfnrclipxfqf vendor extension
dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description
riscv: Add SiFive xsfvfwmaccqqq vendor extension
riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension
riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension
Cyril Bur (1):
riscv: uaccess: Only restore the CSR_STATUS SUM bit
Guo Ren (2):
riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
riscv: xchg: Prefetch the destination word for sc.w
Haibo Xu (1):
perf symbols: Ignore mapping symbols on riscv
Jisheng Zhang (5):
riscv: implement user_access_begin() and families
riscv: uaccess: use input constraints for ptr of __put_user()
riscv: uaccess: use 'asm goto' for put_user()
riscv: uaccess: use 'asm_goto_output' for get_user()
riscv: enable mseal sysmap for RV64
Joel Stanley (1):
riscv: defconfig: Remove EXPERT
Mayuresh Chitale (1):
riscv: mm: Add support for Svinval extension
Miquel Sabaté Solà (1):
riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
Nylon Chen (2):
riscv: misaligned: fix sleeping function called during misaligned access handling
riscv: misaligned: Add handling for ZCB instructions
Palmer Dabbelt (10):
Merge patch series "riscv: misaligned: Add ZCB handling and fix sleeping function"
Merge patch series "riscv: uaccess: optimisations"
Merge patch series "riscv: Add vendor extensions support for SiFive"
Revert "RISC-V: vDSO: Wire up getrandom() vDSO implementation"
Merge patch series "riscv: kexec_file: Support loading Image binary file"
Merge tag 'riscv-mw1-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next
RISC-V: Documentation: Add enough title underlines to CMODX
Merge tag 'riscv-mw2-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next
Merge patch series "riscv: misaligned: fix misaligned accesses handling in put/get_user()"
Merge patch series "riscv: add SBI FWFT misaligned exception delegation support"
Puranjay Mohan (1):
riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
Samuel Holland (1):
riscv: module: Optimize PLT/GOT entry counting
Song Shuai (2):
riscv: kexec_file: Split the loading of kernel and others
riscv: kexec_file: Support loading Image binary file
Tiezhu Yang (1):
riscv: Make regs_irqs_disabled() more clear
Xi Ruoyao (3):
RISC-V: vDSO: Wire up getrandom() vDSO implementation
riscv: vDSO: Remove --hash-style=both
RISC-V: vDSO: Wire up getrandom() vDSO implementation
Yao Zi (1):
riscv/kexec_file: Fix comment in purgatory relocator
è°¢è´é¦ (XIE Zhibang) (1):
RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
.mailmap | 3 +-
Documentation/arch/riscv/cmodx.rst | 46 +-
Documentation/arch/riscv/hwprobe.rst | 26 +
.../devicetree/bindings/riscv/extensions.yaml | 25 +
MAINTAINERS | 4 +-
arch/riscv/Kconfig | 38 +-
arch/riscv/Kconfig.vendor | 13 +
arch/riscv/Makefile | 4 +-
arch/riscv/configs/defconfig | 24 +-
arch/riscv/include/asm/asm-prototypes.h | 2 +-
arch/riscv/include/asm/barrier.h | 5 -
arch/riscv/include/asm/cacheflush.h | 1 +
arch/riscv/include/asm/cmpxchg.h | 4 +-
arch/riscv/include/asm/cpufeature.h | 14 +-
arch/riscv/include/asm/ftrace.h | 62 +-
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/asm/hwprobe.h | 3 +-
arch/riscv/include/asm/image.h | 2 +
arch/riscv/include/asm/insn-def.h | 66 ++
arch/riscv/include/asm/kexec.h | 6 +
arch/riscv/include/asm/pgtable-64.h | 5 +-
arch/riscv/include/asm/pgtable.h | 97 ++
arch/riscv/include/asm/processor.h | 31 +-
arch/riscv/include/asm/ptrace.h | 2 +-
arch/riscv/include/asm/sbi.h | 60 +
arch/riscv/include/asm/tlbflush.h | 2 +
arch/riscv/include/asm/uaccess.h | 218 +++-
arch/riscv/include/asm/vdso/getrandom.h | 30 +
arch/riscv/include/asm/vector.h | 22 +-
arch/riscv/include/asm/vendor_extensions/sifive.h | 16 +
.../include/asm/vendor_extensions/sifive_hwprobe.h | 19 +
arch/riscv/include/uapi/asm/hwprobe.h | 2 +
arch/riscv/include/uapi/asm/vendor/sifive.h | 6 +
arch/riscv/kernel/Makefile | 2 +-
arch/riscv/kernel/asm-offsets.c | 18 +
arch/riscv/kernel/cpufeature.c | 21 +
arch/riscv/kernel/elf_kexec.c | 485 --------
arch/riscv/kernel/entry.S | 9 +
arch/riscv/kernel/ftrace.c | 242 ++--
arch/riscv/kernel/kexec_elf.c | 144 +++
arch/riscv/kernel/kexec_image.c | 96 ++
arch/riscv/kernel/machine_kexec_file.c | 361 ++++++
arch/riscv/kernel/mcount-dyn.S | 117 +-
arch/riscv/kernel/module-sections.c | 81 +-
arch/riscv/kernel/process.c | 2 +-
arch/riscv/kernel/sbi.c | 81 +-
arch/riscv/kernel/sys_hwprobe.c | 6 +
arch/riscv/kernel/traps_misaligned.c | 116 +-
arch/riscv/kernel/unaligned_access_speed.c | 8 +-
arch/riscv/kernel/vdso.c | 2 +-
arch/riscv/kernel/vdso/Makefile | 15 +-
arch/riscv/kernel/vdso/getrandom.c | 10 +
arch/riscv/kernel/vdso/vdso.lds.S | 3 +
arch/riscv/kernel/vdso/vgetrandom-chacha.S | 249 ++++
arch/riscv/kernel/vendor_extensions.c | 10 +
arch/riscv/kernel/vendor_extensions/Makefile | 2 +
arch/riscv/kernel/vendor_extensions/sifive.c | 21 +
.../kernel/vendor_extensions/sifive_hwprobe.c | 22 +
arch/riscv/lib/riscv_v_helpers.c | 11 +-
arch/riscv/lib/uaccess.S | 50 +-
arch/riscv/lib/uaccess_vector.S | 15 +-
arch/riscv/mm/cacheflush.c | 29 +-
arch/riscv/mm/pgtable.c | 10 +
arch/riscv/mm/tlbflush.c | 38 +
include/linux/ftrace.h | 2 +
include/linux/raid/pq.h | 5 +
kernel/trace/ftrace.c | 2 +-
lib/raid6/Makefile | 1 +
lib/raid6/algos.c | 9 +
lib/raid6/recov_rvv.c | 229 ++++
lib/raid6/rvv.c | 1212 ++++++++++++++++++++
lib/raid6/rvv.h | 39 +
tools/perf/util/symbol-elf.c | 6 +
tools/testing/selftests/vDSO/vgetrandom-chacha.S | 2 +
74 files changed, 3787 insertions(+), 855 deletions(-)
create mode 100644 arch/riscv/include/asm/vdso/getrandom.h
create mode 100644 arch/riscv/include/asm/vendor_extensions/sifive.h
create mode 100644 arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h
create mode 100644 arch/riscv/include/uapi/asm/vendor/sifive.h
delete mode 100644 arch/riscv/kernel/elf_kexec.c
create mode 100644 arch/riscv/kernel/kexec_elf.c
create mode 100644 arch/riscv/kernel/kexec_image.c
create mode 100644 arch/riscv/kernel/vdso/getrandom.c
create mode 100644 arch/riscv/kernel/vdso/vgetrandom-chacha.S
create mode 100644 arch/riscv/kernel/vendor_extensions/sifive.c
create mode 100644 arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c
create mode 100644 lib/raid6/recov_rvv.c
create mode 100644 lib/raid6/rvv.c
create mode 100644 lib/raid6/rvv.h
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-06-06 18:10 [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1 Palmer Dabbelt
@ 2025-06-07 1:18 ` pr-tracker-bot
2025-06-10 16:28 ` patchwork-bot+linux-riscv
2025-06-10 17:01 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 8+ messages in thread
From: pr-tracker-bot @ 2025-06-07 1:18 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Linus Torvalds, linux-riscv, linux-kernel
The pull request you sent on Fri, 06 Jun 2025 11:10:37 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.16-mw1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/119b1e61a769aa98e68599f44721661a4d8c55f3
Thank you!
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-06-06 18:10 [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1 Palmer Dabbelt
2025-06-07 1:18 ` pr-tracker-bot
@ 2025-06-10 16:28 ` patchwork-bot+linux-riscv
2025-06-10 17:01 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 8+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-06-10 16:28 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: linux-riscv, torvalds, linux-kernel
Hello:
This pull request was applied to riscv/linux.git (fixes)
by Linus Torvalds <torvalds@linux-foundation.org>:
On Fri, 06 Jun 2025 11:10:37 -0700 (PDT) you wrote:
> The following changes since commit 82f2b0b97b36ee3fcddf0f0780a9a0825d52fec3:
>
> Linux 6.15-rc6 (2025-05-11 14:54:11 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.16-mw1
>
> [...]
Here is the summary with links:
- [GIT,PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
https://git.kernel.org/riscv/c/119b1e61a769
You are awesome, thank you!
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
2025-06-06 18:10 [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1 Palmer Dabbelt
2025-06-07 1:18 ` pr-tracker-bot
2025-06-10 16:28 ` patchwork-bot+linux-riscv
@ 2025-06-10 17:01 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 8+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-06-10 17:01 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: linux-riscv, torvalds, linux-kernel
Hello:
This pull request was applied to riscv/linux.git (for-next)
by Linus Torvalds <torvalds@linux-foundation.org>:
On Fri, 06 Jun 2025 11:10:37 -0700 (PDT) you wrote:
> The following changes since commit 82f2b0b97b36ee3fcddf0f0780a9a0825d52fec3:
>
> Linux 6.15-rc6 (2025-05-11 14:54:11 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.16-mw1
>
> [...]
Here is the summary with links:
- [GIT,PULL] RISC-V Patches for the 6.16 Merge Window, Part 1
https://git.kernel.org/riscv/c/119b1e61a769
You are awesome, thank you!
--
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2025-06-06 18:10 [GIT PULL] RISC-V Patches for the 6.16 Merge Window, Part 1 Palmer Dabbelt
2025-06-07 1:18 ` pr-tracker-bot
2025-06-10 16:28 ` patchwork-bot+linux-riscv
2025-06-10 17:01 ` patchwork-bot+linux-riscv
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2025-05-09 8:28 Alexandre Ghiti
2025-05-13 19:49 ` Alexandre Ghiti
2025-05-29 15:26 ` Palmer Dabbelt
2025-05-30 5:48 ` Alexandre Ghiti
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