From: Chen-Yu Tsai <wens@kernel.org>
To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Sergey Matyukevich <geomatsi@gmail.com>
Cc: linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Charlie Jenkins <charlie@rivosinc.com>
Subject: Re: [PATCH] riscv: dts: allwinner: d1: fix vlenb property
Date: Sat, 22 Nov 2025 09:20:18 +0800 [thread overview]
Message-ID: <176377441825.203955.5834397117362427441.b4-ty@kernel.org> (raw)
In-Reply-To: <20251119203508.1032716-1-geomatsi@gmail.com>
On Wed, 19 Nov 2025 23:35:06 +0300, Sergey Matyukevich wrote:
> According to [1], the C906 vector registers are 128 bits wide.
> The 'thead,vlenb' property specifies the vector register length
> in bytes, so its value must be set to 16.
>
> [1] https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf
>
>
> [...]
Applied to sunxi/fixes-for-6.18 in local tree, thanks!
[1/1] riscv: dts: allwinner: d1: fix vlenb property
commit: 9f393d8e757f79060baf4b2e703bd6b2d0d8d323
Best regards,
--
Chen-Yu Tsai <wens@kernel.org>
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prev parent reply other threads:[~2025-11-22 1:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-19 20:35 [PATCH] riscv: dts: allwinner: d1: fix vlenb property Sergey Matyukevich
2025-11-21 2:58 ` Chen-Yu Tsai
2025-11-22 1:20 ` Chen-Yu Tsai [this message]
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