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[90.182.211.1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a03fef5950sm208756515e9.2.2026.10.05.02.20.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 02:20:55 -0700 (PDT) From: Jerome Brunet To: Changhuang Liang Cc: Michael Turquette , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Brian Masney , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Philipp Zabel , Emil Renner Berthing , Chen Wang , Inochi Amaoto , Alexey Charkov , Thomas Bogendoerfer , Keguang Zhang , "linux-clk@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , Hal Feng Subject: Re: [PATCH v5 2/8] clk: starfive: Add system-0 domain PLL clock driver In-Reply-To: References: <20260828095608.19955-1-changhuang.liang@starfivetech.com> <20260828095608.19955-3-changhuang.liang@starfivetech.com> <179075859479.1471718.5492634704694937513.b4-reply@b4> Date: Mon, 05 Oct 2026 11:20:54 +0200 Message-ID: <1jh5j07bbd.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261005_022058_851862_F2B4F4D3 X-CRM114-Status: GOOD ( 13.12 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Sat 03 Oct 2026 at 11:02, Changhuang Liang wrote: >> > +static const struct jhb100_pll_info jhb100_sys0_pll_info[] = { >> > + JHB100_PLL(JHB100_SYS0PLL_PLL2_OUT, "pll2_out", >> jhb100_pll2_presets, >> > + ARRAY_SIZE(jhb100_pll2_presets), JHB100_PLL2_OFFSET, false), >> > + _JHB100_PLL(JHB100_SYS0PLL_PLL3_OUT, "pll3_out", >> jhb100_pll3_presets, >> > + ARRAY_SIZE(jhb100_pll3_presets), JHB100_PLL3_OFFSET, >> > + CLK_IS_CRITICAL, false), >> > + _JHB100_PLL(JHB100_SYS0PLL_PLL4_OUT, "pll4_out", NULL, 0, >> > + JHB100_PLL4_OFFSET, CLK_IGNORE_UNUSED, true), >> >> Please comment when adding CLK_IGNORE_UNUSED so people have an idea >> why it is needed and how it can be removed > > OK, I understand that there is an intention to remove this flag. On our SoC, some clocks are > typically not referenced by any driver, but we don't want them to be turned off. We currently > use CLK_IGNORE_UNUSED to preserve their hardware-default enabled state. Perhaps in the > next version we will replace it with CLK_IS_CRITICAL. CLK_IGNORE_UNUSED and CLK_IS_CRITICAL do not express the same thing both equally need to be commented so a few years from now, we are not left wondering why this was added. You do not have a driver for this clock today. The fact you still *need* that clock show maybe you should have one and maybe someone, someday, will fix this. > >> _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv