From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v3 1/4] Extract FPU context operations from entry.S
Date: Thu, 2 Aug 2018 04:35:55 -0700 [thread overview]
Message-ID: <20180802113555.GA17108@infradead.org> (raw)
In-Reply-To: <1533188391-5932-2-git-send-email-alankao@andestech.com>
> diff --git a/arch/riscv/kernel/fpu.S b/arch/riscv/kernel/fpu.S
> new file mode 100644
> index 000000000000..3210ef502e55
> --- /dev/null
> +++ b/arch/riscv/kernel/fpu.S
> @@ -0,0 +1,105 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2017 SiFive
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation, version 2.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
It would be good to have SPDX headers fo every new file (and eventually
switch the other RISC-V code over).
Otherwise this looks good:
Reviewed-by: Christoph Hellwig <hch@lst.de>
next prev parent reply other threads:[~2018-08-02 11:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-02 5:39 [PATCH v3 0/4] riscv: Add support to no-FPU systems Alan Kao
2018-08-02 5:39 ` [PATCH v3 1/4] Extract FPU context operations from entry.S Alan Kao
2018-08-02 11:35 ` Christoph Hellwig [this message]
2018-08-02 5:39 ` [PATCH v3 2/4] Refactor FPU codes in signal setup/return procedures Alan Kao
2018-08-02 11:37 ` Christoph Hellwig
2018-08-03 6:42 ` kbuild test robot
2018-08-02 5:39 ` [PATCH v3 3/4] Cleanup ISA string setting Alan Kao
2018-08-02 11:38 ` Christoph Hellwig
2018-08-02 5:39 ` [PATCH v3 4/4] Add an option to support no-FPU systems Alan Kao
2018-08-02 11:41 ` Christoph Hellwig
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