From: hch@lst.de (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits)
Date: Mon, 6 Aug 2018 14:35:27 +0200 [thread overview]
Message-ID: <20180806123527.GB6997@lst.de> (raw)
In-Reply-To: <CAMgXwTgr572J_HH396tfvT7Zj8Jj0fefKOSmVw2+Gwn8qcPR1g@mail.gmail.com>
On Sun, Aug 05, 2018 at 01:02:58PM -0700, Wesley Terpstra wrote:
> FYI, This Xilinx PCIe IP 32-bit cap only applies to SOME instances of
> the IP. The Ultrascale+ version of Xilinx PCIe hard IP does support
> 64-bit or 32-bit. The Virtex7 version only supports 32-bit. The
> pcie-xilinx driver woks with both of these root complexes. So probably
> there should be a conditional hook in the DTS that triggers the
> work-around behaviour.
Either we'll need to able to detect which version we use based on
registrs, or we will indeed need firmware information.
Note that we already have the mechanism for firmware directed dma limits
in place, it is called the dma-ranges DT property. If we can get the
SiFive firmware to set it up properly the RISC-V swiotlb code will
just do the right thing.
next prev parent reply other threads:[~2018-08-06 12:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-04 10:13 add support for Xilinx PCIe root ports on RISC-V v3 Christoph Hellwig
2018-08-04 10:14 ` [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device Christoph Hellwig
2018-08-06 11:23 ` Lorenzo Pieralisi
2018-08-06 12:30 ` Christoph Hellwig
2018-08-06 13:54 ` Arnd Bergmann
2018-08-06 14:55 ` Lorenzo Pieralisi
2018-08-06 19:49 ` Arnd Bergmann
2018-08-04 10:14 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-08-05 20:02 ` Wesley Terpstra
2018-08-06 12:35 ` Christoph Hellwig [this message]
2018-08-06 13:40 ` Lorenzo Pieralisi
2018-08-06 15:33 ` Christoph Hellwig
2018-08-06 16:21 ` Wesley Terpstra
2018-08-06 16:34 ` Christoph Hellwig
2018-08-04 10:14 ` [PATCH 3/3] PCI/xilinx: Depend on OF instead of the ARCH Christoph Hellwig
2018-08-06 10:52 ` Lorenzo Pieralisi
-- strict thread matches above, loose matches on Subject: below --
2018-08-01 15:14 add support for Xilinx PCIe root ports on RISC-V v2 Christoph Hellwig
2018-08-01 15:14 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-06-19 14:16 add support for Xilinx PCIe root ports on RISC-V Christoph Hellwig
2018-06-19 14:16 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
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