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From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver
Date: Mon, 10 Sep 2018 09:13:28 -0700	[thread overview]
Message-ID: <20180910161328.GA13171@infradead.org> (raw)
In-Reply-To: <CAAhSdy1be_ibiowifBdgBZjbHuFU=CR4rZXQDwQghVYkex5bMg@mail.gmail.com>

On Mon, Sep 10, 2018 at 07:59:15PM +0530, Anup Patel wrote:
> > Yes.  external is chained and IPI is still handled explicitly.
> 
> On riscv64, there are 64 local interrupts (i.e. per-CPU interrupts).

There aren't.  There are 9 right now, which are your three below:

> Three of these local interrupts have clearly defined use:
> 1. Software interrupt (inter-processor interrupt)
> 2. External interrupt (interrupt from PLIC)
> 3. Timer interrupt (interrupt from per-CPU timer)

multiplied by 3 for machine, supervisor, user.

> Other local interrupts are available for future use.

The others aren't even defined as other interrupts, but just reserved
fields.  And only one bit per privilege level would even fit into the
encoding scheme used right now.

  parent reply	other threads:[~2018-09-10 16:13 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-06 12:36 [PATCH v2 0/5] New RISC-V Local Interrupt Controller Driver Anup Patel
2018-09-06 12:36 ` [PATCH v2 1/5] RISC-V: self-contained IPI handling routine Anup Patel
2018-09-06 12:36 ` [PATCH v2 2/5] RISC-V: No need to pass scause as arg to do_IRQ() Anup Patel
2018-09-06 12:36 ` [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver Anup Patel
2018-09-06 14:06   ` Christoph Hellwig
2018-09-06 14:19     ` Anup Patel
2018-09-08 10:46     ` Thomas Gleixner
2018-09-10 13:29       ` Christoph Hellwig
2018-09-10 13:34         ` Thomas Gleixner
2018-09-10 13:37           ` Thomas Gleixner
2018-09-10 13:39             ` Christoph Hellwig
2018-09-10 13:45               ` Thomas Gleixner
2018-09-10 13:49                 ` Christoph Hellwig
2018-09-10 14:29                   ` Anup Patel
2018-09-10 16:07                     ` Thomas Gleixner
2018-09-10 16:11                       ` Christoph Hellwig
2018-09-10 16:35                         ` Anup Patel
2018-09-10 16:39                           ` Christoph Hellwig
2018-09-10 17:11                             ` Anup Patel
2018-09-10 19:37                               ` Thomas Gleixner
2018-09-10 22:19                                 ` Christoph Hellwig
2018-09-11  3:57                                   ` Anup Patel
2018-09-11  6:22                                     ` Christoph Hellwig
2018-09-10 22:16                               ` Christoph Hellwig
2018-09-10 16:13                     ` Christoph Hellwig [this message]
2018-09-10 16:32                       ` Anup Patel
2018-09-10 16:35                         ` Christoph Hellwig
2018-09-10 16:38                           ` Anup Patel
2018-09-17 14:14                             ` Christoph Hellwig
2018-09-17 14:28                               ` Anup Patel
2018-09-26  5:54                                 ` Anup Patel
2018-09-26  5:54                                   ` Anup Patel
2018-09-26 15:38                                   ` Palmer Dabbelt
2018-09-26 15:38                                     ` Palmer Dabbelt
2018-09-06 12:36 ` [PATCH v2 4/5] clocksource: riscv_timer: Make timer interrupt as a per-CPU interrupt Anup Patel
2018-09-06 12:36 ` [PATCH v2 5/5] RISC-V: Remove do_IRQ() function Anup Patel

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