From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v3 06/12] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Date: Mon, 10 Sep 2018 23:17:45 -0700 [thread overview]
Message-ID: <20180911061745.GB15060@infradead.org> (raw)
In-Reply-To: <6acd4eec-bdfb-cfc8-6dca-782eb9ec01b0@wdc.com>
On Mon, Sep 10, 2018 at 06:36:52PM -0700, Atish Patra wrote:
> On 9/10/18 4:26 AM, Christoph Hellwig wrote:
> > On Thu, Sep 06, 2018 at 01:05:29AM -0700, Atish Patra wrote:
> > > From: Palmer Dabbelt <palmer@sifive.com>
> > >
> > > It's a bit confusing exactly what this function does: it actually
> > > returns the hartid of an OF processor node, failing with -1 on invalid
> > > nodes. I've changed the name to _hartid() in order to make that a bit
> > > more clear, as well as adding a comment.
> > >
> > > Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
> >
> > Looks generally good, but it is going to conflict with the dt iterators
> > series from Rob. Given that this is just a little cleanup it might be
> > worth deferring until the next merge window.
> >
>
> Sure. np. I guess the entire series can be parked in for-next until the next
> merge window opens.
Actually more in your series also conflicts. I think we can defer the
patch from Rob as it is very small and simple and can be applied post
4.20-rc1.
next prev parent reply other threads:[~2018-09-11 6:17 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-06 8:05 [PATCH v3 00/12] SMP cleanup and new features Atish Patra
2018-09-06 8:05 ` [PATCH v3 01/12] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Atish Patra
2018-09-06 8:05 ` [PATCH v3 02/12] RISC-V: Filter ISA and MMU values in cpuinfo Atish Patra
2018-09-10 11:24 ` Christoph Hellwig
2018-09-11 1:35 ` Atish Patra
2018-09-06 8:05 ` [PATCH v3 03/12] RISC-V: Comment on the TLB flush in smp_callin() Atish Patra
2018-09-10 11:24 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 04/12] RISC-V: Disable preemption before enabling interrupts Atish Patra
2018-09-10 11:24 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 05/12] RISC-V: Provide a cleaner raw_smp_processor_id() Atish Patra
2018-09-10 11:25 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 06/12] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Atish Patra
2018-09-10 11:25 ` Christoph Hellwig
2018-09-11 1:36 ` Atish Patra
2018-09-11 6:17 ` Christoph Hellwig [this message]
2018-09-06 8:05 ` [PATCH v3 07/12] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Atish Patra
2018-09-10 11:26 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 08/12] RISC-V: Use mmgrab() Atish Patra
2018-09-06 8:05 ` [PATCH v3 09/12] RISC-V: User WRITE_ONCE instead of direct access Atish Patra
2018-09-10 11:27 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 10/12] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-09-10 11:27 ` Christoph Hellwig
2018-09-06 8:05 ` [PATCH v3 11/12] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-09-10 11:29 ` Christoph Hellwig
2018-09-11 1:35 ` Atish Patra
2018-09-06 8:05 ` [PATCH v3 12/12] RISC-V: Support cpu hotplug Atish Patra
2018-09-06 10:20 ` Mark Rutland
2018-09-06 18:25 ` Atish Patra
2018-09-11 18:36 ` Atish Patra
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