diff for duplicates of <20181127100317.12809-2-anup@brainfault.org>

diff --git a/a/1.txt b/N1/1.txt
index 7fd9418..ea72c25 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -97,3 +97,9 @@ index 357e9daf94ae..56fce648a901 100644
  
 -- 
 2.17.1
+
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 5c37a72..28c9aa0 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,8 +1,18 @@
  "ref\020181127100317.12809-1-anup@brainfault.org\0"
- "From\0anup@brainfault.org (Anup Patel)\0"
+ "From\0Anup Patel <anup@brainfault.org>\0"
  "Subject\0[PATCH v2 1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base\0"
  "Date\0Tue, 27 Nov 2018 15:33:14 +0530\0"
- "To\0linux-riscv@lists.infradead.org\0"
+ "To\0Palmer Dabbelt <palmer@sifive.com>"
+  Albert Ou <aou@eecs.berkeley.edu>
+  Daniel Lezcano <daniel.lezcano@linaro.org>
+  Thomas Gleixner <tglx@linutronix.de>
+  Jason Cooper <jason@lakedaemon.net>
+ " Marc Zyngier <marc.zyngier@arm.com>\0"
+ "Cc\0Christoph Hellwig <hch@infradead.org>"
+  Atish Patra <atish.patra@wdc.com>
+  linux-riscv@lists.infradead.org
+  linux-kernel@vger.kernel.org
+ " Anup Patel <anup@brainfault.org>\0"
  "\00:1\0"
  "b\0"
  "This patch does following optimizations:\n"
@@ -103,6 +113,12 @@
  " \t}\n"
  " \n"
  "-- \n"
- 2.17.1
+ "2.17.1\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-25a2a876b0bc408ae1f740da4ead145eeb9f0e473ceedc970ffba6ecb8a3b17c
+ba0930c509b34be3a5b2e02f94bbe4de32d20f5c3be375b96f6226adedd3581f
