From: Christoph Hellwig <hch@infradead.org>
To: Gary Guo <gary@garyguo.net>
Cc: Palmer Dabbelt <palmer@sifive.com>,
Anup Patel <Anup.Patel@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <atish.patra@wdc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v4 5/5] riscv: implement IPI-based remote TLB shootdown
Date: Wed, 27 Mar 2019 00:31:31 -0700 [thread overview]
Message-ID: <20190327073131.GA4519@infradead.org> (raw)
In-Reply-To: <d1c980f2e49192c7cb2ddd4f3e4af577d1eaf539.1553647082.git.gary@garyguo.net>
On Wed, Mar 27, 2019 at 12:41:30AM +0000, Gary Guo wrote:
> From: Gary Guo <gary@garyguo.net>
>
> This patch implements IPI-based remote TLB shootdown, which is useful
> at this stage for testing because BBL/OpenSBI ignores operands of
> sbi_remote_sfence_vma_asid and always perform a global TLB flush.
> The SBI-based remote TLB shootdown can still be opt-in using boot
> cmdline "tlbi_method=sbi".
I think Anup now fixes OpenSBI. Do you have benchmarks vs BBL,
old OpenSBI and new OpenSBI?
> +static void ipi_remote_sfence_vma(void *info)
> +{
> + struct tlbi *data = info;
> + unsigned long start = data->start;
> + unsigned long size = data->size;
> + unsigned long i;
> +
> + if (size == SFENCE_VMA_FLUSH_ALL) {
> + local_flush_tlb_all();
> + }
Doesn't this need a return to skip the latter code? Also it might
we worth to just split the all case into entirely separate helpers,
that way the on_each_cpu calls don't need to pass a private data
argument at all.
> +
> + for (i = 0; i < size; i += PAGE_SIZE) {
> + __asm__ __volatile__ ("sfence.vma %0"
> + : : "r" (start + i)
> + : "memory");
> + }
local_flush_tlb_kernel_page?
> +static void ipi_remote_sfence_vma_asid(void *info)
> +{
> + struct tlbi *data = info;
> + unsigned long asid = data->asid;
> + unsigned long start = data->start;
> + unsigned long size = data->size;
> + unsigned long i;
> +
> + if (size == SFENCE_VMA_FLUSH_ALL) {
> + __asm__ __volatile__ ("sfence.vma x0, %0"
> + : : "r" (asid)
> + : "memory");
> + return;
> + }
> +
> + for (i = 0; i < size; i += PAGE_SIZE) {
> + __asm__ __volatile__ ("sfence.vma %0, %1"
> + : : "r" (start + i), "r" (asid)
> + : "memory");
> + }
local_flush_tlb_range?
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next prev parent reply other threads:[~2019-03-27 7:31 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 0:41 [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Gary Guo
2019-03-27 0:41 ` [PATCH v4 1/5] riscv: move flush_icache_{all,mm} to cacheflush.c Gary Guo
2019-03-27 7:06 ` Christoph Hellwig
2019-03-28 6:45 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 3/5] riscv: fix sbi_remote_sfence_vma{,_asid} Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 4/5] riscv: rewrite tlb flush for performance Gary Guo
2019-03-27 7:25 ` Christoph Hellwig
2019-03-27 13:56 ` Gary Guo
2019-03-28 16:17 ` Christoph Hellwig
2019-03-28 16:39 ` Gary Guo
2019-03-28 16:55 ` Christoph Hellwig
2019-03-27 0:41 ` [PATCH v4 2/5] riscv: move switch_mm to its own file Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-27 7:18 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 5/5] riscv: implement IPI-based remote TLB shootdown Gary Guo
2019-03-27 7:31 ` Christoph Hellwig [this message]
2019-03-27 14:03 ` Gary Guo
2019-03-28 16:36 ` Christoph Hellwig
2019-03-28 16:47 ` Gary Guo
2019-03-28 16:57 ` Christoph Hellwig
2019-03-28 6:50 ` Anup Patel
2019-04-10 7:04 ` [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Christoph Hellwig
2019-04-10 9:01 ` Anup Patel
2019-04-10 10:11 ` Christoph Hellwig
2019-04-10 10:22 ` Anup Patel
2019-04-11 1:24 ` Atish Patra
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