Re: [PATCH 24/32] dt-bindings: Document kendryte,k210-fpioa bindings

Damien Le Moal
2020-11-12T11:03:24Z

On Wed, 2020-11-11 at 15:06 +0000, Damien Le Moal wrote:
> On 2020/11/11 23:32, Rob Herring wrote:
> > On Mon, Nov 9, 2020 at 9:45 AM Sean Anderson <seanga2@gmail.com> wrote:
> > >
> > > On 11/9/20 10:36 AM, Rob Herring wrote:
> > > > On Sat, Nov 07, 2020 at 05:14:12PM +0900, Damien Le Moal wrote:
> > > > > Document the device tree bindings for the Kendryte K210 SoC Fully
> > > > > Programmable IO Array (FPIOA) pinctrl driver in
> > > > > Documentation/devicetree/bindings/pinctrl/kendryte,k210-fpioa.yaml
> > > > >
> > > > > Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
> > > > > ---
> > > > >  .../bindings/pinctrl/kendryte,k210-fpioa.yaml | 106 ++++++++++++++++++
> > > > >  1 file changed, 106 insertions(+)
> > > > >  create mode 100644 Documentation/devicetree/bindings/pinctrl/kendryte,k210-fpioa.yaml
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/kendryte,k210-fpioa.yaml b/Documentation/devicetree/bindings/pinctrl/kendryte,k210-fpioa.yaml
> > > > > new file mode 100644
> > > > > index 000000000000..8730add88ee0
> > > > > --- /dev/null
> > > > > +++ b/Documentation/devicetree/bindings/pinctrl/kendryte,k210-fpioa.yaml
> > > > > @@ -0,0 +1,106 @@
> > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > +%YAML 1.2
> > > > > +---
> > > > > +$id: http://devicetree.org/schemas/pinctrl/kendryte,k210-fpioa.yaml#
> > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > +
> > > > > +title: Kendryte K210 FPIOA (Fully Programmable IO Array) Device Tree Bindings
> > > > > +
> > > > > +maintainers:
> > > > > + - Damien Le Moal <damien.lemoal@wdc.com>
> > > > > +
> > > > > +description:
> > > > > + The Kendryte K210 SoC Fully Programmable IO Array controller allows assiging
> > > > > + any of 256 possible functions to any of 48 IO pins. Pin function configuration
> > > > > + is performed on a per-pin basis.
> > > > > +
> > > > > +properties:
> > > > > + compatible:
> > > > > + const: kendryte,k210-fpioa
> > > > > +
> > > > > + reg:
> > > > > + description: FPIOA controller register space base address and size
> > > > > +
> > > > > + clocks:
> > > > > + minItems: 2
> > > > > + maxItems: 2
> > > >
> > > > Can drop these. Implied by 'items' length.
> > > >
> > > > > + items:
> > > > > + - description: Controller reference clock source
> > > > > + - description: APB interface clock source
> > > > > +
> > > > > + clock-names:
> > > > > + minItems: 2
> > > > > + maxItems: 2
> > > > > + items:
> > > > > + - const: ref
> > > > > + - const: pclk
> > > > > +
> > > > > + resets:
> > > > > + maxItems: 1
> > > > > +
> > > > > + kendryte,sysctl:
> > > > > + minItems: 1
> > > > > + maxItems: 1
> > > > > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > > > > + description: |
> > > > > + phandle to the system controller node
> > > > > +
> > > > > + kendryte,power-offset:
> > > > > + minItems: 1
> > > > > + maxItems: 1
> > > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > > + description: |
> > > > > + Offset of the power domain control register of the system controller.
> > > >
> > > > Sounds like you should be using power-domains binding.
> > >
> > > This is for pin power domains. E.g. pins 0-5 can be set to 1V8 or 3V3 logic levels.
> >
> > Okay, please make that clear in the description. You can combine the
> > above 2 properties into one which is a phandle+offset.
>
> Could you point me to an example of such property ? I am not sure how to do that
> so an example would help. Thanks.

Please ignore. Found what I need. Thanks.

>
> >
> > Rob
> >
>
>

--
Damien Le Moal
Western Digital