From: <conor.dooley@microchip.com>
To: <robh+dt@kernel.org>, <jassisinghbrar@gmail.com>,
<aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <devicetree@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Cc: cyril.jean@microchip.com, david.abdurachmanov@gmail.com,
daire.mcnamara@microchip.com, anup.patel@wdc.com,
atish.patra@wdc.com, Conor Dooley <conor.dooley@microchip.com>,
lewis.hanly@microchip.com
Subject: [PATCH 6/6] MAINTAINERS: add microchip polarfire soc support
Date: Thu, 19 Nov 2020 17:04:45 +0000 [thread overview]
Message-ID: <20201119170445.18795-1-conor.dooley@microchip.com> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC
directory
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3da6d8c154e4..2965daaa80e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15000,6 +15000,15 @@ F: arch/riscv/
N: riscv
K: riscv
+RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
+M: Lewis Hanly <lewis.hanly@microchip.com>
+M: Cyril Jean <cyril.jean@microchip.com>
+L: linux-riscv@lists.infradead.org
+S: Supported
+F: drivers/mailbox/mailbox-mpfs.c
+F: drivers/soc/microchip/
+F: include/soc/microchip/mpfs.h
+
RNBD BLOCK DRIVERS
M: Danil Kipnis <danil.kipnis@cloud.ionos.com>
M: Jack Wang <jinpu.wang@cloud.ionos.com>
--
2.17.1
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reply other threads:[~2020-11-19 17:05 UTC|newest]
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