* [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
@ 2020-12-01 11:03 conor.dooley
2020-12-07 15:53 ` Rob Herring
2020-12-07 15:56 ` Rob Herring
0 siblings, 2 replies; 4+ messages in thread
From: conor.dooley @ 2020-12-01 11:03 UTC (permalink / raw)
To: robh+dt, damien.lemoal, jassisinghbrar, aou, paul.walmsley,
palmer, devicetree, linux-riscv
Cc: cyril.jean, david.abdurachmanov, daire.mcnamara, anup.patel,
atish.patra, Conor Dooley, lewis.hanly
From: Conor Dooley <conor.dooley@microchip.com>
Add device tree bindings for the MSS system controller on
the Microchip PolarFire SoC.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../microchip,mpfs_sys_controller.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
new file mode 100644
index 000000000000..c22fc203b95c
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip MPFS system controller
+
+maintainers:
+ - Conor Dooley <conor.dooley@microchip.com>
+
+properties:
+ compatible:
+ const: microchip,polarfire-soc-sys-controller
+
+ mbox-names:
+ maxItems: 1
+ description: name of the mailbox controller device node
+
+ mboxes:
+ maxItems: 1
+ description: |
+ phandle and index of the mailbox controller device node. It must be 0 (hardware supports only one channel).
+
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+required:
+ - compatible
+ - mbox-names
+ - "#address-cells"
+ - "#size-cells"
+ - "mboxes"
+
+additionalProperties: false
+
+examples:
+ - |
+ syscontroller: syscontroller {
+ compatible = "microchip,polarfire-soc-sys-controller";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ mbox-names = "mbox-mpfs";
+ mboxes = <&mbox 0>;
+ };
--
2.17.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
2020-12-01 11:03 [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
@ 2020-12-07 15:53 ` Rob Herring
2020-12-07 15:56 ` Rob Herring
1 sibling, 0 replies; 4+ messages in thread
From: Rob Herring @ 2020-12-07 15:53 UTC (permalink / raw)
To: conor.dooley
Cc: devicetree, damien.lemoal, aou, cyril.jean, david.abdurachmanov,
daire.mcnamara, jassisinghbrar, atish.patra, anup.patel, robh+dt,
palmer, paul.walmsley, lewis.hanly, linux-riscv
On Tue, 01 Dec 2020 11:03:11 +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Add device tree bindings for the MSS system controller on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../microchip,mpfs_sys_controller.yaml | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml:23:111: [warning] line too long (113 > 110 characters) (line-length)
dtschema/dtc warnings/errors:
See https://patchwork.ozlabs.org/patch/1408782
The base for the patch is generally the last rc1. Any dependencies
should be noted.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
2020-12-01 11:03 [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
2020-12-07 15:53 ` Rob Herring
@ 2020-12-07 15:56 ` Rob Herring
2020-12-15 16:10 ` Conor.Dooley
1 sibling, 1 reply; 4+ messages in thread
From: Rob Herring @ 2020-12-07 15:56 UTC (permalink / raw)
To: conor.dooley
Cc: devicetree, damien.lemoal, aou, lewis.hanly, david.abdurachmanov,
daire.mcnamara, jassisinghbrar, atish.patra, anup.patel, palmer,
paul.walmsley, cyril.jean, linux-riscv
On Tue, Dec 01, 2020 at 11:03:11AM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Add device tree bindings for the MSS system controller on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../microchip,mpfs_sys_controller.yaml | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
> new file mode 100644
> index 000000000000..c22fc203b95c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
> @@ -0,0 +1,49 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Microchip MPFS system controller
> +
> +maintainers:
> + - Conor Dooley <conor.dooley@microchip.com>
> +
> +properties:
> + compatible:
> + const: microchip,polarfire-soc-sys-controller
> +
> + mbox-names:
> + maxItems: 1
> + description: name of the mailbox controller device node
Kind of pointless to have names when there is only one entry. I'd drop,
but if you do, you need to define what the name is.
> +
> + mboxes:
> + maxItems: 1
> + description: |
> + phandle and index of the mailbox controller device node. It must be 0 (hardware supports only one channel).
No need to redefine a common property. And the value 0 is outside the
scope of this binding. That's dependent on the mbox h/w.
> +
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
These are not needed unless you have child nodes. If you do, then they
also need to be defined here.
> +
> +required:
> + - compatible
> + - mbox-names
> + - "#address-cells"
> + - "#size-cells"
> + - "mboxes"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscontroller: syscontroller {
> + compatible = "microchip,polarfire-soc-sys-controller";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + mbox-names = "mbox-mpfs";
> + mboxes = <&mbox 0>;
> + };
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
2020-12-07 15:56 ` Rob Herring
@ 2020-12-15 16:10 ` Conor.Dooley
0 siblings, 0 replies; 4+ messages in thread
From: Conor.Dooley @ 2020-12-15 16:10 UTC (permalink / raw)
To: robh
Cc: devicetree, damien.lemoal, aou, Lewis.Hanly, david.abdurachmanov,
Daire.McNamara, jassisinghbrar, atish.patra, anup.patel, palmer,
paul.walmsley, Cyril.Jean, linux-riscv
On 07/12/2020 15:56, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Dec 01, 2020 at 11:03:11AM +0000, conor.dooley@microchip.com wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Add device tree bindings for the MSS system controller on
>> the Microchip PolarFire SoC.
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>> .../microchip,mpfs_sys_controller.yaml | 49 +++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
>> new file mode 100644
>> index 000000000000..c22fc203b95c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
>> @@ -0,0 +1,49 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Microchip MPFS system controller
>> +
>> +maintainers:
>> + - Conor Dooley <conor.dooley@microchip.com>
>> +
>> +properties:
>> + compatible:
>> + const: microchip,polarfire-soc-sys-controller
>> +
>> + mbox-names:
>> + maxItems: 1
>> + description: name of the mailbox controller device node
> Kind of pointless to have names when there is only one entry. I'd drop,
> but if you do, you need to define what the name is.
sure, will drop
>
>> +
>> + mboxes:
>> + maxItems: 1
>> + description: |
>> + phandle and index of the mailbox controller device node. It must be 0 (hardware supports only one channel).
> No need to redefine a common property. And the value 0 is outside the
> scope of this binding. That's dependent on the mbox h/w.
I was going off what the other drivers had done here with the redefinition. Should I be doing something like the bcm2835 instead?
mboxes:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
description: |
phandle and index of the mailbox controller device node.
See: ../mailbox/mailbox.txt for more information.
maxItems: 1
>> +
>> +
>> + "#address-cells":
>> + const: 1
>> +
>> + "#size-cells":
>> + const: 1
> These are not needed unless you have child nodes. If you do, then they
> also need to be defined here.
no child nodes, so ill drop these too
>> +
>> +required:
>> + - compatible
>> + - mbox-names
>> + - "#address-cells"
>> + - "#size-cells"
>> + - "mboxes"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + syscontroller: syscontroller {
>> + compatible = "microchip,polarfire-soc-sys-controller";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + mbox-names = "mbox-mpfs";
>> + mboxes = <&mbox 0>;
>> + };
>> --
>> 2.17.1
>>
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2020-12-01 11:03 [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
2020-12-07 15:53 ` Rob Herring
2020-12-07 15:56 ` Rob Herring
2020-12-15 16:10 ` Conor.Dooley
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