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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id q18sm763803ood.35.2020.12.09.19.56.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Dec 2020 19:56:46 -0800 (PST) Received: (nullmailer pid 1634187 invoked by uid 1000); Thu, 10 Dec 2020 03:56:45 -0000 Date: Wed, 9 Dec 2020 21:56:45 -0600 From: Rob Herring To: Yash Shah Subject: Re: [PATCH v2 3/9] dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC Message-ID: <20201210035645.GA1633151@robh.at.kernel.org> References: <1607403341-57214-1-git-send-email-yash.shah@sifive.com> <1607403341-57214-4-git-send-email-yash.shah@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1607403341-57214-4-git-send-email-yash.shah@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201209_225648_656113_272FF19D X-CRM114-Status: GOOD ( 16.28 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, peter@korsgaard.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, bgolaszewski@baylibre.com, paul.walmsley@sifive.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, andrew@lunn.ch, linux-gpio@vger.kernel.org, broonie@kernel.org, thierry.reding@gmail.com, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, u.kleine-koenig@pengutronix.de, palmer@dabbelt.com, linux-riscv@lists.infradead.org, lee.jones@linaro.org, linus.walleij@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Dec 08, 2020 at 10:25:35AM +0530, Yash Shah wrote: > Add new compatible strings to the DT binding documents to support SiFive > FU740-C000. > > Signed-off-by: Yash Shah > --- > Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml > index 5ac2527..84e6691 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml > +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml > @@ -25,12 +25,15 @@ description: > properties: > compatible: > items: > - - const: sifive,fu540-c000-pwm > + - enum: > + - sifive,fu540-c000-pwm > + - sifive,fu740-c000-pwm > - const: sifive,pwm0 > description: > Should be "sifive,-pwm" and "sifive,pwm". Supported > - compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0 > - as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the > + compatible strings are "sifive,fu540-c000-pwm" and > + "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the > + SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the Better if you reword this so we don't have to update it for every new compatible. > SiFive PWM v0 IP block with no chip integration tweaks. > Please refer to sifive-blocks-ip-versioning.txt for details. > > -- > 2.7.4 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv