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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id w2sm591994otq.9.2021.02.05.11.47.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 11:47:12 -0800 (PST) Received: (nullmailer pid 3597172 invoked by uid 1000); Fri, 05 Feb 2021 19:47:11 -0000 Date: Fri, 5 Feb 2021 13:47:11 -0600 From: Rob Herring To: Damien Le Moal Subject: Re: [PATCH v16 03/16] dt-bindings: update risc-v cpu properties Message-ID: <20210205194711.GA3597111@robh.at.kernel.org> References: <20210205065827.577285-1-damien.lemoal@wdc.com> <20210205065827.577285-4-damien.lemoal@wdc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210205065827.577285-4-damien.lemoal@wdc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210205_144715_064065_2011CDD2 X-CRM114-Status: GOOD ( 12.95 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Anup Patel , Sean Anderson , Atish Patra , Palmer Dabbelt , Paul Walmsley , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 05 Feb 2021 15:58:14 +0900, Damien Le Moal wrote: > The Canaan Kendryte K210 SoC CPU cores are based on a rocket chip > version using a draft verion of the RISC-V ISA specifications. To avoid > any confusion with CPU cores using stable specifications, add the > compatible string "canaan,k210" for this SoC CPU cores. > > Also add the "riscv,none" value to the mmu-type property to allow a DT > to indicate that the CPU being described does not have an MMU or that > it has an MMU that is not usable (which is the case for the K210 SoC). > > Cc: Paul Walmsley > Cc: Rob Herring > Cc: devicetree@vger.kernel.org > Signed-off-by: Damien Le Moal > Reviewed-by: Atish Patra > Reviewed-by: Anup Patel > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv