From: Bin Meng <bmeng.cn@gmail.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Atish Patra <atish.patra@wdc.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes
Date: Wed, 16 Jun 2021 14:02:50 +0800 [thread overview]
Message-ID: <20210616060251.398444-1-bmeng.cn@gmail.com> (raw)
From: Bin Meng <bin.meng@windriver.com>
The "clock-frequency" property of cpu nodes isn't required. Drop it.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index b9819570a7d1..ee54878b3f89 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -17,7 +17,6 @@ cpus {
#size-cells = <0>;
cpu@0 {
- clock-frequency = <0>;
compatible = "sifive,e51", "sifive,rocket0", "riscv";
device_type = "cpu";
i-cache-block-size = <64>;
@@ -35,7 +34,6 @@ cpu0_intc: interrupt-controller {
};
cpu@1 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -62,7 +60,6 @@ cpu1_intc: interrupt-controller {
};
cpu@2 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -89,7 +86,6 @@ cpu2_intc: interrupt-controller {
};
cpu@3 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -116,7 +112,6 @@ cpu3_intc: interrupt-controller {
};
cpu@4 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
--
2.25.1
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next reply other threads:[~2021-06-16 6:02 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-16 6:02 Bin Meng [this message]
2021-06-16 6:02 ` [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA Bin Meng
2021-07-13 15:29 ` Conor.Dooley
2021-07-08 13:39 ` [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes Bin Meng
2021-07-09 8:42 ` Conor.Dooley
2021-07-13 15:29 ` Conor.Dooley
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