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Wong" , devicetree@vger.kernel.org, Guo Ren , Heinrich Schuchardt , Jiri Olsa , John Garry , Jonathan Corbet , linux-doc@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, Nick Kossifidis , Palmer Dabbelt , Paul Walmsley , Rob Herring , Vincent Chen Subject: Re: [v3 00/10] Improve RISC-V Perf support using SBI PMU and sscofpmf extension Message-ID: <20211005121744.728385be@redslave.neermore.group> In-Reply-To: <20210910192757.2309100-1-atish.patra@wdc.com> References: <20210910192757.2309100-1-atish.patra@wdc.com> X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211005_021757_983427_8F8B6F61 X-CRM114-Status: UNSURE ( 8.56 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 10 Sep 2021 12:27:47 -0700 Atish Patra wrote: Hello Atish, > Perf stat: > ========= > > [root@fedora-riscv riscv]# perf stat -e r8000000000000005 -e > r8000000000000007 -e r8000000000000006 -e r0000000000020002 -e > r0000000000020004 -e branch-misses -e cache-misses -e > dTLB-load-misses -e dTLB-store-misses -e iTLB-load-misses -e cycles > -e instructions ./hackbench -pipe 15 process Running with 15*40 (== > 600) tasks. Time: 6.578 > > Performance counter stats for './hackbench -pipe 15 process': > > 6,491 r8000000000000005 (52.59%) --> > SBI_PMU_FW_SET_TIMER 20,433 r8000000000000007 (60.74%) --> > SBI_PMU_FW_IPI_RECVD 21,271 r8000000000000006 (68.71%) --> > SBI_PMU_FW_IPI_SENT 0 r0000000000020002 (76.55%) > r0000000000020004 (0.00%) > branch-misses (0.00%) > cache-misses (0.00%) > 57,537,853 dTLB-load-misses (9.49%) > 2,821,147 dTLB-store-misses (18.64%) > 52,928,130 iTLB-load-misses (27.53%) > 89,521,791,110 cycles (36.08%) > 90,678,132,464 instructions # 1.01 insn per cycle > (44.44%) > > 6.975908032 seconds time elapsed > > 3.130950000 seconds user > 24.353310000 seconds sys > Tested your patch series with qemu and got results as expected: perf stat -e r8000000000000005 -e r8000000000000007 \ -e r8000000000000006 -e r0000000000020002 -e r0000000000020004 -e branch-misses \ -e cache-misses -e dTLB-load-misses -e dTLB-store-misses -e iTLB-load-misses \ -e cycles -e instructions ./hackbench -pipe 15 process Running with 15*40 (== 600) tasks.nch -pipe 15 process Time: 20.027 Performance counter stats for './hackbench -pipe 15 process': 4896 r8000000000000005 (53.34%) 0 r8000000000000007 (61.20%) 0 r8000000000000006 (68.88%) 0 r0000000000020002 (76.53%) r0000000000020004 (0.00%) branch-misses (0.00%) cache-misses (0.00%) 48414917 dTLB-load-misses (9.87%) 2427413 dTLB-store-misses (19.43%) 46958092 iTLB-load-misses (28.58%) 69245163600 cycles (37.09%) 70334279943 instructions # 1.02 insn per cycle (45.24%) 20.895871900 seconds time elapsed 2.724942000 seconds user 18.126277000 seconds sys perf top/record also works. Tested-by: Nikita Shubin Yours, Nikita Shubin _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv