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From: "João Mário Domingos" <joao.mario@tecnico.ulisboa.pt>
To: Atish Patra <atishp@atishpatra.org>
Cc: Jessica Clarke <jrtc27@jrtc27.com>,
	Nikita Shubin <nikita.shubin@maquefel.me>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup.patel@wdc.com>,
	linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v2 0/4] Introduce pmu-events support for HiFive Unmatched
Date: Tue, 23 Nov 2021 17:39:01 +0000	[thread overview]
Message-ID: <20211123173900.GA13786@joaomariovmubuntu> (raw)
In-Reply-To: <CAOnJCU+5=mMrjQMwyf5aOwbXEtNeFE=LVQpVJsc56fZ59PZwDA@mail.gmail.com>

On Mon, Nov 22, 2021 at 01:17:33PM -0800, Atish Patra wrote:
> On Mon, Nov 22, 2021 at 8:26 AM Jessica Clarke <jrtc27@jrtc27.com> wrote:
> >
> > On 22 Nov 2021, at 14:57, João Mário Domingos <joao.mario@tecnico.ulisboa.pt> wrote:
> > > On Thu, Nov 18, 2021 at 12:00:09AM -0800, Atish Patra wrote:
> > >> On Wed, Nov 17, 2021 at 4:25 AM Nikita Shubin <nikita.shubin@maquefel.me> wrote:
> > >>>
> > >>> On Tue, 16 Nov 2021 15:48:08 +0000
> > >>> João Mário Domingos <joao.mario@tecnico.ulisboa.pt> wrote:
> > >>>
> > >>> Hello Mario!
> > >>>
> > >>> Thank you for your patch series.
> > >>>
> > >>> I have reproduced your test with some u-boot dts tinkering, and got
> > >>> similar results.
> > >>>
> > >>> However,
> > >>>
> > >>>>
> > >>>> [1] https://github.com/atishp04/opensbi/tree/pmu_sscofpmf_v2
> > >>>
> > >>> OpenSBI sscofpmf has been merged.
> > >>>
> > >>>> [2] https://github.com/atishp04/u-boot/tree/hifive_unmatched_dt_pmu
> > >>>> [5]
> > >>>> https://github.com/atishp04/u-boot/blob/hifive_unmatched_dt_pmu/arch/riscv/dts/fu740-c000.dtsi
> > >>>
> > >>> Is missing the adaptation for OpenSBI bitmap patch for
> > >>> "raw-event-to-mhpmcounters".
> > >>
> > >> My patch was just an example and predates before the bitmap patch
> > >> posted by Vincent.
> > >> I will update the U-boot patch along with the next kernel version.
> > >>
> > >>>
> > >>>> [3] https://github.com/atishp04/linux/tree/riscv_pmu_v4
> > >>>
> > >>> The link is broken.
> > >>>
> > >>
> > >> Sorry. This should be
> > >> https://github.com/atishp04/linux/tree/sbi_pmu_v4
> > >>
> > >>>> [4]
> > >>>> http://lists.infradead.org/pipermail/linux-riscv/2021-October/009408.html
> > >>>
> > >>>> [6]
> > >>>> https://patchwork.ozlabs.org/project/opensbi/patch/20211105013301.27656-1-vincent.chen@sifive.com/
> > >>>>
> > >>>
> > >>> There is a version 2 submitted, and it won't apply as require rebasing
> > >>> and some renaming.
> > >>>
> > >>> Please share your u-boot dts changes - they should be small and provide
> > >>> a common base for this series.
> > >>>
> > >>
> > >> Yes. That would be really helpful to have a DT path with all the
> > >> entries for easier testing.
> > >>
> > >>
> > >
> > > As the changes to the U-Boot are short I'm including them here, please tell me if I
> > > should include them in other way. I merged my changes with Atish's own
> > > patch to simplify the process.
> > >
> > > diff -u b/arch/riscv/dts/fu740-c000.dtsi b/arch/riscv/dts/fu740-c000.dtsi
> > > --- b/arch/riscv/dts/fu740-c000.dtsi
> > > +++ b/arch/riscv/dts/fu740-c000.dtsi
> > > @@ -141,6 +141,49 @@
> > >                #size-cells = <2>;
> > >                compatible = "sifive,fu740-c000", "sifive,fu740", "simple-bus";
> > >                ranges;
> > > +               pmu {
> > > +                       compatible = "riscv,pmu";
> > > +                       pmu,raw-event-to-mhpmcounters = <0x00000000 0x00000100 0x18
> > > +                                                       0x00000000 0x00000200 0x18
> > > +                                                       0x00000000 0x00000400 0x18
> > > +                                                       0x00000000 0x00000800 0x18
> > > +                                                       0x00000000 0x00001000 0x18
> > > +                                                       0x00000000 0x00002000 0x18
> > > +                                                       0x00000000 0x00004000 0x18
> > > +                                                       0x00000000 0x00008000 0x18
> > > +                                                       0x00000000 0x00010000 0x18
> > > +                                                       0x00000000 0x00020000 0x18
> > > +                                                       0x00000000 0x00040000 0x18
> > > +                                                       0x00000000 0x00080000 0x18
> > > +                                                       0x00000000 0x00100000 0x18
> > > +                                                       0x00000000 0x00200000 0x18
> > > +                                                       0x00000000 0x00400000 0x18
> > > +                                                       0x00000000 0x00800000 0x18
> > > +                                                       0x00000000 0x01000000 0x18
> > > +                                                       0x00000000 0x02000000 0x18
> > > +                                                       0x00000000 0x00000101 0x18
> > > +                                                       0x00000000 0x00000201 0x18
> > > +                                                       0x00000000 0x00000401 0x18
> > > +                                                       0x00000000 0x00000801 0x18
> > > +                                                       0x00000000 0x00001001 0x18
> > > +                                                       0x00000000 0x00002001 0x18
> > > +                                                       0x00000000 0x00004001 0x18
> > > +                                                       0x00000000 0x00008001 0x18
> > > +                                                       0x00000000 0x00010001 0x18
> > > +                                                       0x00000000 0x00020001 0x18
> > > +                                                       0x00000000 0x00040001 0x18
> > > +                                                       0x00000000 0x00000102 0x18
> > > +                                                       0x00000000 0x00000202 0x18
> > > +                                                       0x00000000 0x00000402 0x18
> > > +                                                       0x00000000 0x00000802 0x18
> > > +                                                       0x00000000 0x00001002 0x18
> > > +                                                       0x00000000 0x00002002 0x18>;
> > > +                       pmu,event-to-mhpmcounters = <0x05 0x06 0x18
> > > +                                                    0x10009 0x10009 0x18>;
> > > +                       pmu,event-to-mhpmevent = <0x05 0x00000000 0x4000
> > > +                                                 0x06 0x00000000 0x4001
> > > +                                                 0x10008 0x00000000 0x102>;
> > > +               };
> > >                plic0: interrupt-controller@c000000 {
> > >                        #interrupt-cells = <1>;
> > >                        compatible = "sifive,plic-1.0.0”;
> >
> > I still highly disagree with this. The presence of the SBI PMU
> > extension is a property of the firmware, not the SoC, so it has no
> > place in /soc. Moreover its existence can be probed via the
> > sbi_probe_extension SBI call. It is already discoverable.
> >
> > See my responses to Atish’s patches for more details.
> Hi Jessica,
> I am working on revising the PMU series based on your feedback.
> The diff proposed here will go into the device tree in U-Boot meant to be used
> for firmware. Firmware should remove these DT properties before
> jumping to the Linux kernel
> Currently OpenSBI does this as well.
>
Hi Atish and Jessica, I've seen your responses in Atish's patches and I
will update this series in accordance with the upcoming Atish's
changes.
From what I can anticipate the modifications will be minor, if
any, as this relates mainly to U-boot, as Atish stated.
> 
> > Jess
> >
> 
> 
> -- 
> Regards,
> Atish

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  reply	other threads:[~2021-11-23 17:39 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-09 10:25 [PATCH 0/4] Introduce pmu-events support for HiFive Unmatched João Mário Domingos
2021-11-09 10:25 ` [PATCH 1/4] RISC-V: Create unique identification for SoC PMU João Mário Domingos
2021-11-15  8:23   ` Nikita Shubin
2021-11-16 15:54     ` João Mário Domingos
2021-11-09 10:25 ` [PATCH 2/4] RISC-V: Support CPUID for risc-v in perf João Mário Domingos
2021-11-09 10:25 ` [PATCH 3/4] RISC-V: Added generic pmu-events mapfile João Mário Domingos
2021-11-09 10:25 ` [PATCH 4/4] RISC-V: Added HiFive Unmatched PMU events João Mário Domingos
2021-11-10 13:55 ` [PATCH 0/4] Introduce pmu-events support for HiFive Unmatched Nikita Shubin
2021-11-16 15:48 ` [PATCH v2 " João Mário Domingos
2021-11-16 15:48   ` [PATCH v2 1/4] RISC-V: Create unique identification for SoC PMU João Mário Domingos
2021-11-16 15:48   ` [PATCH v2 2/4] RISC-V: Support CPUID for risc-v in perf João Mário Domingos
2021-11-16 15:48   ` [PATCH v2 3/4] RISC-V: Added generic pmu-events mapfile João Mário Domingos
2021-11-16 15:48   ` [PATCH v2 4/4] RISC-V: Added HiFive Unmatched PMU events João Mário Domingos
2021-11-17 11:25     ` Nikita Shubin
2021-11-22 15:24       ` João Mário Domingos
2021-11-23  5:19         ` Nikita Shubin
2021-11-17 12:25   ` [PATCH v2 0/4] Introduce pmu-events support for HiFive Unmatched Nikita Shubin
2021-11-18  8:00     ` Atish Patra
2021-11-22 14:57       ` João Mário Domingos
2021-11-22 16:26         ` Jessica Clarke
2021-11-22 21:17           ` Atish Patra
2021-11-23 17:39             ` João Mário Domingos [this message]
2021-11-23  5:24         ` Nikita Shubin

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