From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E451FC433F5 for ; Thu, 25 Nov 2021 15:31:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=A5SYzZhSW/UngNC468am4yCM97LZStbcE2eiByvJ2t4=; b=gD70xem7beZWPD rcNSZZ4MaaCzN0O1swsRjP5WKYePfASQ01hm5KjQLwc9an/Cr1qTc1Tn8lLtxzkCrS3Kq0GQLUtPv Ydh5fZLML/oGyutA55xki6pOjS4Rv2DaAzqiWNf5X0z2AI2006kF0j3XMdlctYTPtn8zIaHB5E6K6 z8EzwGl7lQI8+KoTtiId1fWWAW9VzTK+ezKIbuEsRNmc7z29YGMA9NQQzcG7o6OJ2R3oL28CfWJKW AQ+qoC6O4QmbQEh0P3kJ3PF5lfCHozmd08nsdR0ae5DQdkxBSsUSs1KrYwszz61ieEWbXGl9NwULw eXSzkSu36Zzy8ENpdsbQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mqGiv-0081wN-ME; Thu, 25 Nov 2021 15:31:45 +0000 Received: from xavier.telenet-ops.be ([2a02:1800:120:4::f00:14]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mqGio-0081rn-FN for linux-riscv@lists.infradead.org; Thu, 25 Nov 2021 15:31:40 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:1511:ffa3:275:45dd]) by xavier.telenet-ops.be with bizsmtp id NfXa260035CGg7701fXaAB; Thu, 25 Nov 2021 16:31:35 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1mqGij-000DSS-Ex; Thu, 25 Nov 2021 16:31:33 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1mqGii-000gZH-MI; Thu, 25 Nov 2021 16:31:32 +0100 From: Geert Uytterhoeven To: Rob Herring , Paul Walmsley , Palmer Dabbelt , Albert Ou , Damien Le Moal , Lewis Hanly , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 7/9] riscv: dts: sifive: Group tuples in register properties Date: Thu, 25 Nov 2021 16:31:29 +0100 Message-Id: <20211125153131.163533-8-geert@linux-m68k.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125153131.163533-1-geert@linux-m68k.org> References: <20211125153131.163533-1-geert@linux-m68k.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211125_073138_680503_60E3E340 X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org To improve human readability and enable automatic validation, the tuples in "reg" properties containing register blocks should be grouped using angle brackets. Signed-off-by: Geert Uytterhoeven --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 0655b5c4201d9f71..35d75a8aa8cc9031 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -195,8 +195,8 @@ i2c0: i2c@10030000 { }; qspi0: spi@10040000 { compatible = "sifive,fu540-c000-spi", "sifive,spi0"; - reg = <0x0 0x10040000 0x0 0x1000 - 0x0 0x20000000 0x0 0x10000000>; + reg = <0x0 0x10040000 0x0 0x1000>, + <0x0 0x20000000 0x0 0x10000000>; interrupt-parent = <&plic0>; interrupts = <51>; clocks = <&prci PRCI_CLK_TLCLK>; @@ -206,8 +206,8 @@ qspi0: spi@10040000 { }; qspi1: spi@10041000 { compatible = "sifive,fu540-c000-spi", "sifive,spi0"; - reg = <0x0 0x10041000 0x0 0x1000 - 0x0 0x30000000 0x0 0x10000000>; + reg = <0x0 0x10041000 0x0 0x1000>, + <0x0 0x30000000 0x0 0x10000000>; interrupt-parent = <&plic0>; interrupts = <52>; clocks = <&prci PRCI_CLK_TLCLK>; @@ -229,8 +229,8 @@ eth0: ethernet@10090000 { compatible = "sifive,fu540-c000-gem"; interrupt-parent = <&plic0>; interrupts = <53>; - reg = <0x0 0x10090000 0x0 0x2000 - 0x0 0x100a0000 0x0 0x1000>; + reg = <0x0 0x10090000 0x0 0x2000>, + <0x0 0x100a0000 0x0 0x1000>; local-mac-address = [00 00 00 00 00 00]; clock-names = "pclk", "hclk"; clocks = <&prci PRCI_CLK_GEMGXLPLL>, -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv