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From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	dlustig@nvidia.com, gfavor@ventanamicro.com,
	andrea.mondelli@huawei.com, behrensj@mit.edu,
	xinhaoqu@huawei.com, huffman@cadence.com, mick@ics.forth.gr,
	allen.baum@esperantotech.com, jscheid@ventanamicro.com,
	rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v5 01/14] riscv: only use IPIs to handle cache-flushes on remote cpus
Date: Fri, 21 Jan 2022 17:36:05 +0100	[thread overview]
Message-ID: <20220121163618.351934-2-heiko@sntech.de> (raw)
In-Reply-To: <20220121163618.351934-1-heiko@sntech.de>

Right now, the flush_icache functions always use the SBI remote-fence
when SBI is available, leaving using IPIs as a fallback mechanism.

IPIs on the other hand are more flexible, as the ipi_ops are initially
set to go through SBI but later will be overwritten to go through the
ACLINT/CLINT.

In a discussion we had, Nick was of the opinion that "In general we
should prefer doing IPIs on S-mode through CLINT instead of going
through SBI/M-mode, so IMHO we should only be using
on_each_cpu_mask(ipi_remote_fence_i) on flush_icache_all()/
flush_icache_mm() and remove any explicit calls to sbi_remote_fence_i(),
because this way we continue using SBI for doing remote fences even after
CLINT/ACLINT driver is registered, instead of using direct IPIs through
CLINT/ACLINT."

So follow this suggestion and just do ipi calls to have the proper kernel
parts do them,

This also fixes the null-ptr dereference happening when flush_icache_all()
is called before sbi_init().

Suggested-by: Nick Kossifidis <mick@ics.forth.gr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/mm/cacheflush.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96ad9c7..c35375cd52ec 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -17,11 +17,7 @@ static void ipi_remote_fence_i(void *info)
 void flush_icache_all(void)
 {
 	local_flush_icache_all();
-
-	if (IS_ENABLED(CONFIG_RISCV_SBI))
-		sbi_remote_fence_i(NULL);
-	else
-		on_each_cpu(ipi_remote_fence_i, NULL, 1);
+	on_each_cpu(ipi_remote_fence_i, NULL, 1);
 }
 EXPORT_SYMBOL(flush_icache_all);
 
@@ -66,8 +62,6 @@ void flush_icache_mm(struct mm_struct *mm, bool local)
 		 * with flush_icache_deferred().
 		 */
 		smp_mb();
-	} else if (IS_ENABLED(CONFIG_RISCV_SBI)) {
-		sbi_remote_fence_i(&others);
 	} else {
 		on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1);
 	}
-- 
2.30.2


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  reply	other threads:[~2022-01-21 16:37 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-21 16:36 [PATCH v5 00/14] riscv: support for svpbmt and D1 memory types Heiko Stuebner
2022-01-21 16:36 ` Heiko Stuebner [this message]
2022-01-22  3:45   ` [PATCH v5 01/14] riscv: only use IPIs to handle cache-flushes on remote cpus Atish Patra
2022-01-24 12:30     ` Heiko Stübner
2022-01-22  4:10   ` Anup Patel
2022-01-21 16:36 ` [PATCH v5 02/14] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 03/14] riscv: allow different stages with alternatives Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 04/14] riscv: implement module alternatives Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 05/14] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 06/14] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 07/14] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 08/14] riscv: move boot alternatives to a slightly earlier position Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 09/14] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 10/14] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt Heiko Stuebner
2022-02-04 22:33   ` Rob Herring
2022-02-07 13:39     ` Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 12/14] riscv: add RISC-V Svpbmt extension supports Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 13/14] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-01-21 16:36 ` [PATCH v5 14/14] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-01-24  7:22 ` [PATCH v5 00/14] riscv: support for svpbmt and D1 memory types Christoph Hellwig

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