From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 6/6] RISC-V: Use IPIs for remote icache flush when possible
Date: Tue, 25 Jan 2022 11:12:17 +0530 [thread overview]
Message-ID: <20220125054217.383482-7-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220125054217.383482-1-apatel@ventanamicro.com>
If IPI calls are injected using SBI IPI calls then remote icache flush
using SBI RFENCE calls is much faster because using IPIs for remote
icache flush would still endup as SBI IPI calls with extra processing
on the kernel side.
It is now possible to have specialized hardware (such as RISC-V AIA
and RISC-V ACLINT) which allows S-mode software to directly inject
IPIs without any assistance from M-mode runtime firmware.
This patch extends remote icache flush functions to use IPIs whenever
underlying IPI operations are suitable for remote FENCEs.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/mm/cacheflush.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96ad9c7..7c7e44aaf791 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -18,7 +18,7 @@ void flush_icache_all(void)
{
local_flush_icache_all();
- if (IS_ENABLED(CONFIG_RISCV_SBI))
+ if (IS_ENABLED(CONFIG_RISCV_SBI) && !riscv_use_ipi_for_rfence())
sbi_remote_fence_i(NULL);
else
on_each_cpu(ipi_remote_fence_i, NULL, 1);
@@ -66,7 +66,8 @@ void flush_icache_mm(struct mm_struct *mm, bool local)
* with flush_icache_deferred().
*/
smp_mb();
- } else if (IS_ENABLED(CONFIG_RISCV_SBI)) {
+ } else if (IS_ENABLED(CONFIG_RISCV_SBI) &&
+ !riscv_use_ipi_for_rfence()) {
sbi_remote_fence_i(&others);
} else {
on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1);
--
2.25.1
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prev parent reply other threads:[~2022-01-25 5:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-25 5:42 [PATCH 0/6] RISC-V IPI Improvements Anup Patel
2022-01-25 5:42 ` [PATCH 1/6] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2022-01-25 5:42 ` [PATCH 2/6] irqchip/riscv-intc: Set intc domain as the default host Anup Patel
2022-01-25 18:17 ` Marc Zyngier
2022-01-26 3:16 ` Anup Patel
2022-01-26 9:01 ` Marc Zyngier
2022-01-26 10:12 ` Anup Patel
2022-01-26 10:46 ` Marc Zyngier
2022-01-26 15:38 ` Anup Patel
2022-01-25 5:42 ` [PATCH 3/6] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2022-01-25 5:42 ` [PATCH 4/6] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2022-01-25 5:42 ` [PATCH 5/6] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2022-01-25 5:42 ` Anup Patel [this message]
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