From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE24BC433EF for ; Tue, 12 Apr 2022 19:15:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:To:Cc:From:Subject: References:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4HpGZRm3NDGqQy/twk/86TLbHHF4+7jV1y+eHA4qMQ4=; b=R81nknNzUyEQAx R+l4Qthk5MqA5bZT4+FC5aL3j6J3RkdAD6845KzA6Gbzry0kQJbJ9uVUf3nWmSW1643ljM6LpaFY7 Prjd+OezfRN94FPKjDsnBa4mOV8bmxLClDmLoZp6mEUxqOuvBnRi+8r16kBM2wNNcvfar/udtS1Al iu/nuDiw2WpFCIwCEkzvoFI1ruxc+5/Lw9kuiLoSQG5S4G7FTnQM/VSjS5crlbXBC9W6nvjdZWiwB 0mLeumUMrFls80/d10spb9/2xAT+9+u6Kesmrk08MVJyVjV/BCGUEZy+9KvpO5vvu2ovohS+2EP22 VJVLey9PeNjavNjpe+AQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1neLyZ-00FZcn-0u; Tue, 12 Apr 2022 19:14:55 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1neLyW-00FZcI-B5 for linux-riscv@lists.infradead.org; Tue, 12 Apr 2022 19:14:53 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 204BC61B95; Tue, 12 Apr 2022 19:14:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66335C385A1; Tue, 12 Apr 2022 19:14:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649790887; bh=bcAefXnMbjN8CcigBKO+g1I/idDevweEN7l4fJ9EEgU=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=i2CBPPGcMCEfc7GP3tVSa1cfoGzVqvE7SZZh9K8M6Qfx09N6T2gvGP29wI3z/2CbP Z8pLTIGtQoLUl7Wx9ILSS1PuHI8UCOmFeYgr6Gt7tUqaONznxPD3Wh9L5PG9VRcyUB Je9xLtuDhd1Yj5XsHdE/JtLQexAtlASNYuXNIoHe7Y5ohLLQiD6VeYzWb/xenjQNgS +oY5rOm+rrxbMU72L8ZYfDMoKlSRlpFYW7zdFXcZ8QZ4BhAq7DtZ1o4dJRsaOyfcAW A1eMrBKoAev2PYV6rVBlcJkI9wBjXl4eu7AErOrvEPz7ALx/aPrczwdj4yig/7UU4I DuWCep8evarPQ== MIME-Version: 1.0 In-Reply-To: <20220411085916.941433-8-conor.dooley@microchip.com> References: <20220411085916.941433-1-conor.dooley@microchip.com> <20220411085916.941433-8-conor.dooley@microchip.com> Subject: Re: [PATCH v2 7/9] clk: microchip: mpfs: re-parent the configurable clocks From: Stephen Boyd Cc: daire.mcnamara@microchip.com, linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org, Conor Dooley To: Conor Dooley , a.zummo@towertech.it, alexandre.belloni@bootlin.com, aou@eecs.berkeley.edu, krzk+dt@kernel.org, mturquette@baylibre.com, palmer@rivosinc.com, paul.walmsley@sifive.com, robh+dt@kernel.org Date: Tue, 12 Apr 2022 12:14:45 -0700 User-Agent: alot/0.10 Message-Id: <20220412191447.66335C385A1@smtp.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220412_121452_456012_E74E67D5 X-CRM114-Status: GOOD ( 15.65 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Quoting Conor Dooley (2022-04-11 01:59:15) > Currently the mpfs clock driver uses a reference clock called the > "msspll", set in the device tree, as the parent for the cpu/axi/ahb > (config) clocks. The frequency of the msspll is determined by the FPGA > bitstream & the bootloader configures the clock to match the bitstream. > The real reference is provided by a 100 or 125 MHz off chip oscillator. > > However, the msspll clock is not actually the parent of all clocks on > the system - the reference clock for the rtc/mtimer actually has the > off chip oscillator as its parent. > > In order to fix this, add support for reading the configuration of the > msspll & reparent the "config" clocks so that they are derived from > this clock rather than the reference in the device tree. > > Fixes: 635e5e73370e ("clk: microchip: Add driver for Microchip PolarFire SoC") > Reviewed-by: Daire McNamara > Signed-off-by: Conor Dooley > --- > > @Stephen/Mike: Is it acceptable to add the recalc rate without a set > rate? If not lmk and I will add one. Only recalc_rate is OK. It's like a read-only divider. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv