From: Palmer Dabbelt <palmer@rivosinc.com>
To: linux-riscv@lists.infradead.org, rdunlap@infradead.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
aou@eecs.berkeley.edu, anup@brainfault.org,
vincent.chen@sifive.com, guoren@kernel.org,
Atish Patra <atishp@rivosinc.com>,
alexandre.ghiti@canonical.com, jszhang@kernel.org,
vitaly.wool@konsulko.com, gatecat@ds0.me,
wangkefeng.wang@huawei.com, mick@ics.forth.gr,
panqinglin2020@iscas.ac.cn, rppt@kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux@rivosinc.com, Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file
Date: Wed, 20 Apr 2022 11:40:55 -0700 [thread overview]
Message-ID: <20220420184056.7886-4-palmer@rivosinc.com> (raw)
In-Reply-To: <20220420184056.7886-1-palmer@rivosinc.com>
From: Palmer Dabbelt <palmer@rivosinc.com>
This was broken by the original refactoring (as the XIP definitions
depend on <asm/pgtable.h>) and then more broken by the merge (as I
accidentally took the old version). This fixes both breakages, while
also pulling this out of <asm/asm.h> to avoid polluting most assembly
files with the XIP fixups.
Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/include/asm/asm.h | 26 ------------------------
arch/riscv/include/asm/xip_fixup.h | 32 ++++++++++++++++++++++++++++++
arch/riscv/kernel/head.S | 1 +
arch/riscv/kernel/suspend_entry.S | 1 +
4 files changed, 34 insertions(+), 26 deletions(-)
create mode 100644 arch/riscv/include/asm/xip_fixup.h
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 8c2549b16ac0..618d7c5af1a2 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -67,30 +67,4 @@
#error "Unexpected __SIZEOF_SHORT__"
#endif
-#ifdef __ASSEMBLY__
-
-/* Common assembly source macros */
-
-#ifdef CONFIG_XIP_KERNEL
-.macro XIP_FIXUP_OFFSET reg
- REG_L t0, _xip_fixup
- add \reg, \reg, t0
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
- la t1, __data_loc
- REG_L t1, _xip_phys_offset
- sub \reg, \reg, t1
- add \reg, \reg, t0
-.endm
-_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
-_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
-#else
-.macro XIP_FIXUP_OFFSET reg
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
-.endm
-#endif /* CONFIG_XIP_KERNEL */
-
-#endif /* __ASSEMBLY__ */
-
#endif /* _ASM_RISCV_ASM_H */
diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
new file mode 100644
index 000000000000..0d0754305324
--- /dev/null
+++ b/arch/riscv/include/asm/xip_fixup.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * XIP fixup macros, only useful in assembly.
+ */
+#ifndef _ASM_RISCV_XIP_FIXUP_H
+#define _ASM_RISCV_XIP_FIXUP_H
+
+#include <linux/pgtable.h>
+
+#ifdef CONFIG_XIP_KERNEL
+.macro XIP_FIXUP_OFFSET reg
+ REG_L t0, _xip_fixup
+ add \reg, \reg, t0
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+ la t1, __data_loc
+ li t0, XIP_OFFSET_MASK
+ and t1, t1, t0
+ li t1, XIP_OFFSET
+ sub t0, t0, t1
+ sub \reg, \reg, t0
+.endm
+
+_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
+#else
+.macro XIP_FIXUP_OFFSET reg
+.endm
+.macro XIP_FIXUP_FLASH_OFFSET reg
+.endm
+#endif /* CONFIG_XIP_KERNEL */
+
+#endif
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 893b8bb69391..822c33aa7f45 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -14,6 +14,7 @@
#include <asm/hwcap.h>
#include <asm/image.h>
+#include <asm/xip_fixup.h>
#include "efi-header.S"
__HEAD
diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
index 4b07b809a2b8..aafcca58c19d 100644
--- a/arch/riscv/kernel/suspend_entry.S
+++ b/arch/riscv/kernel/suspend_entry.S
@@ -8,6 +8,7 @@
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/csr.h>
+#include <asm/xip_fixup.h>
.text
.altmacro
--
2.34.1
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next prev parent reply other threads:[~2022-04-20 18:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-20 18:40 [PATCH v2 0/4] RISC-V: Various XIP fixes Palmer Dabbelt
2022-04-20 18:40 ` [PATCH v2 1/4] RISC-V: Avoid empty create_*_mapping definitions Palmer Dabbelt
2022-04-20 22:11 ` Andreas Schwab
2022-05-25 21:32 ` Palmer Dabbelt
2022-04-20 18:40 ` [PATCH v2 2/4] RISC-V: ignore xipImage Palmer Dabbelt
2022-04-21 6:26 ` Guo Ren
2022-04-20 18:40 ` Palmer Dabbelt [this message]
2022-04-21 6:45 ` [PATCH v2 3/4] RISC-V: Split out the XIP fixups into their own file Guo Ren
2022-05-25 21:45 ` Palmer Dabbelt
2022-04-20 18:40 ` [PATCH v2 4/4] RISC-V: Fix the XIP build Palmer Dabbelt
2022-04-21 6:46 ` Guo Ren
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