From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: Mayuresh Chitale <mchitale@ventanamicro.com>,
Atish Patra <atishp@atishpatra.org>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org
Subject: [RFC PATCH v3 0/2] Risc-V Svinval support
Date: Fri, 12 Aug 2022 09:59:19 +0530 [thread overview]
Message-ID: <20220812042921.14508-1-mchitale@ventanamicro.com> (raw)
This patch adds support for the Svinval extension as defined in the
Risc V Privileged specification. This patchset depends on the following
series from Anup:
https://patchwork.kernel.org/project/linux-riscv/list/?series=661505
Changes in v3:
- Fix incorrect vma used for sinval instructions
- Use unified static key mechanism for svinval
- Rebased on torvalds/master
Changes in v2:
- Rebased on 5.18-rc3
- update riscv_fill_hwcap to probe Svinval extension
Mayuresh Chitale (2):
riscv: enum for svinval extension
riscv: mm: use svinval instructions instead of sfence.vma
arch/riscv/include/asm/hwcap.h | 4 ++
arch/riscv/kernel/cpu.c | 1 +
arch/riscv/kernel/cpufeature.c | 1 +
arch/riscv/mm/tlbflush.c | 108 +++++++++++++++++++++++++++++++--
4 files changed, 108 insertions(+), 6 deletions(-)
--
2.34.1
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next reply other threads:[~2022-08-12 4:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-12 4:29 Mayuresh Chitale [this message]
2022-08-12 4:29 ` [RFC PATCH v3 1/2] riscv: enum for svinval extension Mayuresh Chitale
2022-08-12 4:29 ` [RFC PATCH v3 2/2] riscv: mm: use svinval instructions instead of sfence.vma Mayuresh Chitale
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