From: Conor Dooley <conor.dooley@microchip.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Claudiu Beznea <claudiu.beznea@microchip.com>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Subject: [PATCH v5 07/14] riscv: dts: microchip: add mpfs specific macb reset support
Date: Fri, 9 Sep 2022 13:31:16 +0100 [thread overview]
Message-ID: <20220909123123.2699583-8-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220909123123.2699583-1-conor.dooley@microchip.com>
The macb on PolarFire SoC has reset support which the generic compatible
does not use. Add the newly introduced MPFS specific compatible as the
primary compatible to avail of this support & wire up the reset to the
clock controllers devicetree entry.
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 499c2e63ad35..ae5839534d9c 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -234,6 +234,7 @@ clkcfg: clkcfg@20002000 {
reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
clocks = <&refclk>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
mmuart0: serial@20000000 {
@@ -383,7 +384,7 @@ can1: can@2010d000 {
};
mac0: ethernet@20110000 {
- compatible = "cdns,macb";
+ compatible = "microchip,mpfs-macb", "cdns,macb";
reg = <0x0 0x20110000 0x0 0x2000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -392,11 +393,12 @@ mac0: ethernet@20110000 {
local-mac-address = [00 00 00 00 00 00];
clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;
clock-names = "pclk", "hclk";
+ resets = <&clkcfg CLK_MAC0>;
status = "disabled";
};
mac1: ethernet@20112000 {
- compatible = "cdns,macb";
+ compatible = "microchip,mpfs-macb", "cdns,macb";
reg = <0x0 0x20112000 0x0 0x2000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -405,6 +407,7 @@ mac1: ethernet@20112000 {
local-mac-address = [00 00 00 00 00 00];
clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;
clock-names = "pclk", "hclk";
+ resets = <&clkcfg CLK_MAC1>;
status = "disabled";
};
--
2.36.1
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next prev parent reply other threads:[~2022-09-09 12:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-09 12:31 [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups Conor Dooley
2022-09-09 12:31 ` [PATCH v5 01/14] clk: microchip: mpfs: fix clk_cfg array bounds violation Conor Dooley
2022-09-12 7:40 ` Claudiu.Beznea
2022-09-29 0:30 ` Stephen Boyd
2022-09-29 0:32 ` Stephen Boyd
2022-09-09 12:31 ` [PATCH v5 02/14] clk: microchip: mpfs: make the rtc's ahb clock critical Conor Dooley
2022-09-09 12:31 ` [PATCH v5 03/14] dt-bindings: clk: microchip: mpfs: add reset controller support Conor Dooley
2022-09-09 12:31 ` [PATCH v5 04/14] clk: microchip: mpfs: add reset controller Conor Dooley
2022-09-09 12:31 ` [PATCH v5 05/14] reset: add polarfire soc reset support Conor Dooley
2022-09-09 12:31 ` [PATCH v5 06/14] MAINTAINERS: add polarfire soc reset controller Conor Dooley
2022-09-09 12:31 ` Conor Dooley [this message]
2023-03-07 15:16 ` [PATCH v5 07/14] riscv: dts: microchip: add mpfs specific macb reset support Conor Dooley
2022-09-09 12:31 ` [PATCH v5 08/14] clk: microchip: mpfs: add MSS pll's set & round rate Conor Dooley
2022-09-09 12:31 ` [PATCH v5 09/14] clk: microchip: mpfs: move id & offset out of clock structs Conor Dooley
2022-09-09 12:31 ` [PATCH v5 10/14] clk: microchip: mpfs: simplify control reg access Conor Dooley
2022-09-09 12:31 ` [PATCH v5 11/14] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Conor Dooley
2022-09-09 12:31 ` [PATCH v5 12/14] clk: microchip: mpfs: convert cfg_clk to clk_divider Conor Dooley
2022-09-09 12:31 ` [PATCH v5 13/14] clk: microchip: mpfs: convert periph_clk to clk_gate Conor Dooley
2022-09-09 12:31 ` [PATCH v5 14/14] clk: microchip: mpfs: update module authorship & licencing Conor Dooley
2022-09-09 12:34 ` [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups Conor.Dooley
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