From: Masami Hiramatsu (Google) <mhiramat@kernel.org>
To: "liaochang (A)" <liaochang1@huawei.com>
Cc: Jisheng Zhang <jszhang@kernel.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
<rostedt@goodmis.org>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv/kprobe: Optimize the performance of patching instruction slot
Date: Sat, 10 Sep 2022 11:24:35 +0900 [thread overview]
Message-ID: <20220910112435.3c3f72afee5182f7ec1c1ce6@kernel.org> (raw)
In-Reply-To: <50a65f24-08b7-ab36-5e25-b6a90f90a9d8@huawei.com>
On Fri, 9 Sep 2022 09:55:08 +0800
"liaochang (A)" <liaochang1@huawei.com> wrote:
>
>
> 在 2022/9/8 20:49, Masami Hiramatsu (Google) 写道:
> > On Thu, 8 Sep 2022 09:43:45 +0800
> > "liaochang (A)" <liaochang1@huawei.com> wrote:
> >
> >> Thanks for comment.
> >>
> >> 在 2022/9/8 1:21, Jisheng Zhang 写道:
> >>> On Wed, Sep 07, 2022 at 10:33:27AM +0800, Liao Chang wrote:
> >>>> Since no race condition occurs on each instruction slot, hence it is
> >>>> safe to patch instruction slot without stopping machine.
> >>>
> >>> hmm, IMHO there's race when arming kprobe under SMP, so stopping
> >>> machine is necessary here. Maybe I misundertand something.
> >>>
> >>
> >> It is indeed necessary to stop machine when arm kprobe under SMP,
> >> but i don't think it need to stop machine when prepare instruction slot,
> >> two reasons:
> >>
> >> 1. Instruction slot is dynamically allocated data.
> >> 2. Kernel would not execute instruction slot until original instruction
> >> is replaced by breakpoint.
> >
> > Ah, this is for ss (single step out of line) slot. So until
> > kprobe is enabled, this should not be used from other cores.
> > OK, then it should be safe.
>
> Exactly, Masami, and i find out this optimization could be applied to some other
> architectures, such as arm64 and csky, do you think it is good time to do them all.
Yes, we should reduce the stop_machine() usage. Thanks for pointing it!
>
> Thanks.
>
> >
> >
> >>>>
> >>>> Signed-off-by: Liao Chang <liaochang1@huawei.com>
> >>>> ---
> >>>> arch/riscv/kernel/probes/kprobes.c | 8 +++++---
> >>>> 1 file changed, 5 insertions(+), 3 deletions(-)
> >>>>
> >>>> diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
> >>>> index e6e950b7cf32..eff7d7fab535 100644
> >>>> --- a/arch/riscv/kernel/probes/kprobes.c
> >>>> +++ b/arch/riscv/kernel/probes/kprobes.c
> >>>> @@ -24,12 +24,14 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
> >>>> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> >>>> {
> >>>> unsigned long offset = GET_INSN_LENGTH(p->opcode);
> >>>> + const kprobe_opcode_t brk_insn = __BUG_INSN_32;
> >>>> + kprobe_opcode_t slot[MAX_INSN_SIZE];
> >>>>
> >>>> p->ainsn.api.restore = (unsigned long)p->addr + offset;
> >>>>
> >>>> - patch_text(p->ainsn.api.insn, p->opcode);
> >>>> - patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset),
> >>>> - __BUG_INSN_32);
> >>>> + memcpy(slot, &p->opcode, offset);
> >>>> + memcpy((void *)((unsigned long)slot + offset), &brk_insn, 4);
> >>>> + patch_text_nosync(p->ainsn.api.insn, slot, offset + 4);
> >
> > BTW, didn't you have a macro for the size of __BUG_INSN_32?
> >
> > Thank you,
>
> I think you are saying GET_INSN_LENGTH, i will use it to caculate
> the size of __BUG_INSN_32 in v2, instead of magic number '4'.
Yeah, that's better.
Thank you!
>
> Thanks.
>
> >
> >
> >>>> }
> >>>>
> >>>> static void __kprobes arch_prepare_simulate(struct kprobe *p)
> >>>> --
> >>>> 2.17.1
> >>>>
> >>>>
> >>>> _______________________________________________
> >>>> linux-riscv mailing list
> >>>> linux-riscv@lists.infradead.org
> >>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
> >>> .
> >>
> >> --
> >> BR,
> >> Liao, Chang
> >
> >
>
> --
> BR,
> Liao, Chang
--
Masami Hiramatsu (Google) <mhiramat@kernel.org>
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linux-riscv mailing list
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prev parent reply other threads:[~2022-09-10 2:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 2:33 [PATCH] riscv/kprobe: Optimize the performance of patching instruction slot Liao Chang
2022-09-07 17:21 ` Jisheng Zhang
2022-09-07 22:28 ` Masami Hiramatsu
2022-09-08 1:43 ` liaochang (A)
2022-09-08 12:49 ` Masami Hiramatsu
2022-09-09 1:55 ` liaochang (A)
2022-09-10 2:24 ` Masami Hiramatsu [this message]
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