From: Stephen Boyd <sboyd@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Rob Herring <robh+dt@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Claudiu Beznea <claudiu.beznea@microchip.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Nathan Chancellor <nathan@kernel.org>
Subject: Re: [PATCH v5 01/14] clk: microchip: mpfs: fix clk_cfg array bounds violation
Date: Wed, 28 Sep 2022 17:30:28 -0700 [thread overview]
Message-ID: <20220929003030.0A61AC433D6@smtp.kernel.org> (raw)
In-Reply-To: <20220909123123.2699583-2-conor.dooley@microchip.com>
Quoting Conor Dooley (2022-09-09 05:31:10)
> There is an array bounds violation present during clock registration,
> triggered by current code by only specific toolchains. This seems to
> fail gracefully in v6.0-rc1, using a toolchain build from the riscv-
> gnu-toolchain repo and with clang-15, and life carries on. While
> converting the driver to use standard clock structs/ops, kernel panics
> were seen during boot when built with clang-15:
>
[...]
>
> If parent is RTCREF, so the macro becomes: &mpfs_cfg_clks[33].cfg.hw
> which is well beyond the end of the array. Amazingly, builds with GCC
> 11.1 see no problem here, booting correctly and hooking the parent up
> etc. Builds with clang-15 do not, with the above panic.
>
> Change the macro to use specific offsets depending on the parent rather
> than the dt-binding's clock IDs.
>
> Fixes: 1c6a7ea32b8c ("clk: microchip: mpfs: add RTCREF clock control")
> CC: Nathan Chancellor <nathan@kernel.org>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
I'll merge this patch over to clk-fixes as well.
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next prev parent reply other threads:[~2022-09-29 0:30 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-09 12:31 [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups Conor Dooley
2022-09-09 12:31 ` [PATCH v5 01/14] clk: microchip: mpfs: fix clk_cfg array bounds violation Conor Dooley
2022-09-12 7:40 ` Claudiu.Beznea
2022-09-29 0:30 ` Stephen Boyd [this message]
2022-09-29 0:32 ` Stephen Boyd
2022-09-09 12:31 ` [PATCH v5 02/14] clk: microchip: mpfs: make the rtc's ahb clock critical Conor Dooley
2022-09-09 12:31 ` [PATCH v5 03/14] dt-bindings: clk: microchip: mpfs: add reset controller support Conor Dooley
2022-09-09 12:31 ` [PATCH v5 04/14] clk: microchip: mpfs: add reset controller Conor Dooley
2022-09-09 12:31 ` [PATCH v5 05/14] reset: add polarfire soc reset support Conor Dooley
2022-09-09 12:31 ` [PATCH v5 06/14] MAINTAINERS: add polarfire soc reset controller Conor Dooley
2022-09-09 12:31 ` [PATCH v5 07/14] riscv: dts: microchip: add mpfs specific macb reset support Conor Dooley
2023-03-07 15:16 ` Conor Dooley
2022-09-09 12:31 ` [PATCH v5 08/14] clk: microchip: mpfs: add MSS pll's set & round rate Conor Dooley
2022-09-09 12:31 ` [PATCH v5 09/14] clk: microchip: mpfs: move id & offset out of clock structs Conor Dooley
2022-09-09 12:31 ` [PATCH v5 10/14] clk: microchip: mpfs: simplify control reg access Conor Dooley
2022-09-09 12:31 ` [PATCH v5 11/14] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Conor Dooley
2022-09-09 12:31 ` [PATCH v5 12/14] clk: microchip: mpfs: convert cfg_clk to clk_divider Conor Dooley
2022-09-09 12:31 ` [PATCH v5 13/14] clk: microchip: mpfs: convert periph_clk to clk_gate Conor Dooley
2022-09-09 12:31 ` [PATCH v5 14/14] clk: microchip: mpfs: update module authorship & licencing Conor Dooley
2022-09-09 12:34 ` [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups Conor.Dooley
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