* [GIT PULL 1/2] MAINTAINERS: update polarfire soc clock binding
2022-10-10 22:17 [GIT PULL 0/2] microchip maintainers updates Conor Dooley
@ 2022-10-10 22:17 ` Conor Dooley
2022-10-10 22:17 ` [GIT PULL 2/2] dt-bindings: riscv: update microchip.yaml's maintainership Conor Dooley
2022-10-11 18:20 ` [GIT PULL 0/2] microchip maintainers updates Palmer Dabbelt
2 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2022-10-10 22:17 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Conor Dooley, linux-riscv
From: Conor Dooley <conor.dooley@microchip.com>
The clock binding has been renamed and a new binding added for the
clock controllers in the FPGA fabric. Generalise the pattern to
cover both.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0dc4a769216b..94cf47ea5f80 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17645,7 +17645,7 @@ M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-riscv@lists.infradead.org
S: Supported
-F: Documentation/devicetree/bindings/clock/microchip,mpfs.yaml
+F: Documentation/devicetree/bindings/clock/microchip,mpfs*.yaml
F: Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml
F: Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
--
2.37.3
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [GIT PULL 2/2] dt-bindings: riscv: update microchip.yaml's maintainership
2022-10-10 22:17 [GIT PULL 0/2] microchip maintainers updates Conor Dooley
2022-10-10 22:17 ` [GIT PULL 1/2] MAINTAINERS: update polarfire soc clock binding Conor Dooley
@ 2022-10-10 22:17 ` Conor Dooley
2022-10-11 18:20 ` [GIT PULL 0/2] microchip maintainers updates Palmer Dabbelt
2 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2022-10-10 22:17 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Conor Dooley, linux-riscv, Krzysztof Kozlowski
From: Conor Dooley <conor.dooley@microchip.com>
Daire and I are the platform maintainers for Microchip's RISC-V
FPGAs. Update the maintainers in microchip.yaml to reflect this and
explicitly add the binding to the SoC's MAINTAINERS entry.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
Documentation/devicetree/bindings/riscv/microchip.yaml | 4 ++--
MAINTAINERS | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml
index 1aa7336a9672..9faf8447332b 100644
--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml
@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip PolarFire SoC-based boards device tree bindings
maintainers:
- - Cyril Jean <Cyril.Jean@microchip.com>
- - Lewis Hanly <lewis.hanly@microchip.com>
+ - Conor Dooley <conor.dooley@microchip.com>
+ - Daire McNamara <daire.mcnamara@microchip.com>
description:
Microchip PolarFire SoC-based boards
diff --git a/MAINTAINERS b/MAINTAINERS
index 94cf47ea5f80..b3415857a812 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17651,6 +17651,7 @@ F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml
F: Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
F: Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
F: Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
+F: Documentation/devicetree/bindings/riscv/microchip.yaml
F: Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
F: Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
F: Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml
--
2.37.3
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [GIT PULL 0/2] microchip maintainers updates
2022-10-10 22:17 [GIT PULL 0/2] microchip maintainers updates Conor Dooley
2022-10-10 22:17 ` [GIT PULL 1/2] MAINTAINERS: update polarfire soc clock binding Conor Dooley
2022-10-10 22:17 ` [GIT PULL 2/2] dt-bindings: riscv: update microchip.yaml's maintainership Conor Dooley
@ 2022-10-11 18:20 ` Palmer Dabbelt
2022-10-11 18:26 ` Conor Dooley
2 siblings, 1 reply; 6+ messages in thread
From: Palmer Dabbelt @ 2022-10-11 18:20 UTC (permalink / raw)
To: Conor Dooley; +Cc: conor.dooley, linux-riscv
On Mon, 10 Oct 2022 15:17:03 PDT (-0700), Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Hey Palmer,
>
> Two maintainers changes that I posted on the lists a while back.
> Neither applied at the time b/c the maintainers entry was being updated
> in the soc fixes branch and in some for-next branches at the same time
> and they conflicted.
>
> If you could pick the two that'd be great.
So you want me to just pick up these patches? That's OK, it's just not
a pull request and that's what the subject says.
>
> Thanks,
> Conor.
>
> Conor Dooley (2):
> MAINTAINERS: update polarfire soc clock binding
> dt-bindings: riscv: update microchip.yaml's maintainership
>
> Documentation/devicetree/bindings/riscv/microchip.yaml | 4 ++--
> MAINTAINERS | 3 ++-
> 2 files changed, 4 insertions(+), 3 deletions(-)
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [GIT PULL 0/2] microchip maintainers updates
2022-10-11 18:20 ` [GIT PULL 0/2] microchip maintainers updates Palmer Dabbelt
@ 2022-10-11 18:26 ` Conor Dooley
2022-10-11 19:40 ` Palmer Dabbelt
0 siblings, 1 reply; 6+ messages in thread
From: Conor Dooley @ 2022-10-11 18:26 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: conor.dooley, linux-riscv
On Tue, Oct 11, 2022 at 11:20:29AM -0700, Palmer Dabbelt wrote:
> On Mon, 10 Oct 2022 15:17:03 PDT (-0700), Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Hey Palmer,
> >
> > Two maintainers changes that I posted on the lists a while back.
> > Neither applied at the time b/c the maintainers entry was being updated
> > in the soc fixes branch and in some for-next branches at the same time
> > and they conflicted.
> >
> > If you could pick the two that'd be great.
>
> So you want me to just pick up these patches?
Please.
> That's OK, it's just not a
> pull request and that's what the subject says.
Sorry about that. I'd seen people doing it that way for trivial
patchsets, eg to arm-soc for dt-bindings, to signify that they
were intended to be/ready to be picked directly. I'll stick with
"pull" for tags only in the future.
Conor.
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [GIT PULL 0/2] microchip maintainers updates
2022-10-11 18:26 ` Conor Dooley
@ 2022-10-11 19:40 ` Palmer Dabbelt
0 siblings, 0 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2022-10-11 19:40 UTC (permalink / raw)
To: Conor Dooley; +Cc: conor.dooley, linux-riscv
On Tue, 11 Oct 2022 11:26:12 PDT (-0700), Conor Dooley wrote:
> On Tue, Oct 11, 2022 at 11:20:29AM -0700, Palmer Dabbelt wrote:
>> On Mon, 10 Oct 2022 15:17:03 PDT (-0700), Conor Dooley wrote:
>> > From: Conor Dooley <conor.dooley@microchip.com>
>> >
>> > Hey Palmer,
>> >
>> > Two maintainers changes that I posted on the lists a while back.
>> > Neither applied at the time b/c the maintainers entry was being updated
>> > in the soc fixes branch and in some for-next branches at the same time
>> > and they conflicted.
>> >
>> > If you could pick the two that'd be great.
>>
>> So you want me to just pick up these patches?
>
> Please.
>
>> That's OK, it's just not a
>> pull request and that's what the subject says.
>
> Sorry about that. I'd seen people doing it that way for trivial
> patchsets, eg to arm-soc for dt-bindings, to signify that they
> were intended to be/ready to be picked directly. I'll stick with
> "pull" for tags only in the future.
No problem, if that's what folks do then I'm OK with it. I just hadn't
seen it before so wasn't sure what was up (doubly so because you send
you'd be sending a pull). They're on for-next, hopefully patchwork
sends the email too...
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