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From: Heiko Stuebner <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: christoph.muellner@vrull.eu, conor@kernel.org,
	philipp.tomsich@vrull.eu, ajones@ventanamicro.com,
	heiko@sntech.de, jszhang@kernel.org,
	Heiko Stuebner <heiko.stuebner@vrull.eu>
Subject: [PATCH 1/4] RISC-V: use bit-values instead of numbers to identify patched cpu-features
Date: Fri, 13 Jan 2023 22:23:48 +0100	[thread overview]
Message-ID: <20230113212351.3534769-2-heiko@sntech.de> (raw)
In-Reply-To: <20230113212351.3534769-1-heiko@sntech.de>

From: Heiko Stuebner <heiko.stuebner@vrull.eu>

RISC-V cpufeatures are often based on available extensions and maybe even
some combination of them. Using a bitfield for the errata-id gives us a
simple way to also require a combination of extensions for a specific
alternative patch.

Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/include/asm/errata_list.h |  6 +++---
 arch/riscv/kernel/cpufeature.c       | 12 +++++-------
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index 95e626b7281e..40c9e9c3295b 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -22,9 +22,9 @@
 #define	ERRATA_THEAD_NUMBER 3
 #endif
 
-#define	CPUFEATURE_SVPBMT 0
-#define	CPUFEATURE_ZICBOM 1
-#define	CPUFEATURE_ZBB 2
+#define	CPUFEATURE_SVPBMT 	(1 << 0)
+#define	CPUFEATURE_ZICBOM	(1 << 1)
+#define	CPUFEATURE_ZBB		(1 << 2)
 #define	CPUFEATURE_NUMBER 3
 
 #ifdef __ASSEMBLY__
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 7bfc6eb9a5cf..8c83bd9d0e22 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -350,13 +350,13 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
 	u32 cpu_req_feature = 0;
 
 	if (cpufeature_probe_svpbmt(stage))
-		cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
+		cpu_req_feature |= CPUFEATURE_SVPBMT;
 
 	if (cpufeature_probe_zicbom(stage))
-		cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
+		cpu_req_feature |= CPUFEATURE_ZICBOM;
 
 	if (cpufeature_probe_zbb(stage))
-		cpu_req_feature |= BIT(CPUFEATURE_ZBB);
+		cpu_req_feature |= CPUFEATURE_ZBB;
 
 	return cpu_req_feature;
 }
@@ -367,19 +367,17 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
 {
 	u32 cpu_req_feature = cpufeature_probe(stage);
 	struct alt_entry *alt;
-	u32 tmp;
 
 	for (alt = begin; alt < end; alt++) {
 		if (alt->vendor_id != 0)
 			continue;
-		if (alt->errata_id >= CPUFEATURE_NUMBER) {
+		if (alt->errata_id & GENMASK(31, CPUFEATURE_NUMBER)) {
 			WARN(1, "This feature id:%d is not in kernel cpufeature list",
 				alt->errata_id);
 			continue;
 		}
 
-		tmp = (1U << alt->errata_id);
-		if (cpu_req_feature & tmp) {
+		if ((cpu_req_feature & alt->errata_id) == alt->errata_id) {
 			patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
 			riscv_alternative_fix_offsets(alt->old_ptr, alt->alt_len,
 						      alt->old_ptr - alt->alt_ptr);
-- 
2.35.1


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  reply	other threads:[~2023-01-13 21:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-13 21:23 [PATCH 0/4] Zbb + fast-unaligned string optimization Heiko Stuebner
2023-01-13 21:23 ` Heiko Stuebner [this message]
2023-01-14 17:54   ` [PATCH 1/4] RISC-V: use bit-values instead of numbers to identify patched cpu-features Conor Dooley
2023-01-13 21:23 ` [PATCH 2/4] RISC-V: add alternative-field for bits to not match against Heiko Stuebner
2023-01-14 17:44   ` Conor Dooley
2023-01-17 12:41   ` Andrew Jones
2023-01-13 21:23 ` [PATCH 3/4] RISC-V: add cpufeature probing for fast-unaligned access Heiko Stuebner
2023-01-13 21:23 ` [PATCH 4/4] RISC-V: add strcmp variant using zbb and " Heiko Stuebner
2023-05-11 21:06 ` [PATCH 0/4] Zbb + fast-unaligned string optimization Palmer Dabbelt

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