Re: [PATCH v1 2/3] dma: dw-axi-dmac: Add support for StarFive DMA

Walker Chen
2023-02-13T13:09:33Z

On 2023/2/10 16:59, Vinod Koul wrote:
> On 06-02-23, 19:38, Walker Chen wrote:
>> Adding DMA reset operation in device probe, and using different
>> registers according to the hardware handshake number.
>
> subsystem tag is dmaengine: xxx

OK, the tag will be changed to dmaengine.

>
>>
>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> ---
>> .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 25 ++++++++++++++++---
>> drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++
>> 2 files changed, 24 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> index a183d93bd7e2..3581810033d2 100644
>> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> @@ -25,6 +25,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_runtime.h>
>> #include <linux/property.h>
>> +#include <linux/reset.h>
>> #include <linux/slab.h>
>> #include <linux/types.h>
>>
>> @@ -86,7 +87,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan,
>>
>> cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS |
>> config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS);
>> - if (chan->chip->dw->hdata->reg_map_8_channels) {
>> + if (chan->chip->dw->hdata->reg_map_8_channels &&
>> + !chan->chip->dw->hdata->use_cfg2) {
>
> what about older/other platforms that dont have use_cfg2?

The use_cfg2 variable's default value is false, the original logic will not be affected.
Rob herring gave a suggestion that it is assigned according to compatible string, like that:
if (of_device_is_compatible(node, "starfive,jh7110-axi-dma")) {
...
chip->dw->hdata->use_cfg2 = true;
}

>
>> cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS |
>> config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS |
>> config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS |
>> @@ -541,8 +543,6 @@ static void dw_axi_dma_set_hw_channel(struct axi_dma_chan *chan, bool set)
>> (chan->id * DMA_APB_HS_SEL_BIT_SIZE));
>> reg_value |= (val << (chan->id * DMA_APB_HS_SEL_BIT_SIZE));
>> lo_hi_writeq(reg_value, chip->apb_regs + DMAC_APB_HW_HS_SEL_0);
>> -
>> - return;
>> }
>>

Thanks

Best regards,
Walker