From: Andrew Jones <ajones@ventanamicro.com>
To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
devicetree@vger.kernel.org
Cc: 'Anup Patel ' <apatel@ventanamicro.com>,
'Palmer Dabbelt ' <palmer@dabbelt.com>,
'Paul Walmsley ' <paul.walmsley@sifive.com>,
'Krzysztof Kozlowski ' <krzysztof.kozlowski+dt@linaro.org>,
'Atish Patra ' <atishp@rivosinc.com>,
'Heiko Stuebner ' <heiko@sntech.de>,
'Jisheng Zhang ' <jszhang@kernel.org>,
'Rob Herring ' <robh@kernel.org>,
'Albert Ou ' <aou@eecs.berkeley.edu>,
'Conor Dooley ' <conor.dooley@microchip.com>
Subject: [PATCH v4 1/8] RISC-V: alternatives: Support patching multiple insns in assembly
Date: Thu, 9 Feb 2023 16:26:21 +0100 [thread overview]
Message-ID: <20230209152628.129914-2-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230209152628.129914-1-ajones@ventanamicro.com>
As pointed out in commit d374a16539b1 ("RISC-V: fix compile error
from deduplicated __ALTERNATIVE_CFG_2"), we need quotes around
parameters passed to macros within macros to avoid spaces being
interpreted as separators. ALT_NEW_CONTENT was trying to handle
this by defining new_c has a vararg, but this isn't sufficient
for calling ALTERNATIVE() from assembly with multiple instructions
in the new/old sequences. Remove the vararg "hack" and use quotes.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/asm/alternative-macros.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index 51c6867e02f3..7bc52f33f95f 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -14,7 +14,7 @@
.4byte \errata_id
.endm
-.macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c : vararg
+.macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c
.if \enable
.pushsection .alternative, "a"
ALT_ENTRY 886b, 888f, \vendor_id, \errata_id, 889f - 888f
@@ -41,13 +41,13 @@
\old_c
.option pop
887 :
- ALT_NEW_CONTENT \vendor_id, \errata_id, \enable, \new_c
+ ALT_NEW_CONTENT \vendor_id, \errata_id, \enable, "\new_c"
.endm
.macro ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
new_c_2, vendor_id_2, errata_id_2, enable_2
ALTERNATIVE_CFG "\old_c", "\new_c_1", \vendor_id_1, \errata_id_1, \enable_1
- ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
+ ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, "\new_c_2"
.endm
#define __ALTERNATIVE_CFG(...) ALTERNATIVE_CFG __VA_ARGS__
--
2.39.1
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next prev parent reply other threads:[~2023-02-09 15:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 15:26 [PATCH v4 0/8] RISC-V: Apply Zicboz to clear_page Andrew Jones
2023-02-09 15:26 ` Andrew Jones [this message]
2023-02-09 18:02 ` [PATCH v4 1/8] RISC-V: alternatives: Support patching multiple insns in assembly Conor Dooley
2023-02-09 15:26 ` [PATCH v4 2/8] RISC-V: Factor out body of riscv_init_cbom_blocksize loop Andrew Jones
2023-02-09 15:26 ` [PATCH v4 3/8] dt-bindings: riscv: Document cboz-block-size Andrew Jones
2023-02-09 15:26 ` [PATCH v4 4/8] RISC-V: Add Zicboz detection and block size parsing Andrew Jones
2023-02-09 15:26 ` [PATCH v4 5/8] RISC-V: cpufeature: Put vendor_id to work Andrew Jones
2023-02-09 19:04 ` Conor Dooley
2023-02-10 7:58 ` Andrew Jones
2023-02-10 20:29 ` Conor Dooley
2023-02-12 16:26 ` Andrew Jones
2023-02-09 15:26 ` [PATCH v4 6/8] RISC-V: Use Zicboz in clear_page when available Andrew Jones
2023-02-09 19:09 ` Conor Dooley
2023-02-10 8:05 ` Andrew Jones
2023-02-10 9:04 ` Conor Dooley
2023-02-17 10:18 ` Ben Dooks
2023-02-17 10:50 ` Ben Dooks
2023-02-17 12:29 ` Andrew Jones
2023-02-20 18:43 ` Ben Dooks
2023-02-20 19:24 ` Andrew Jones
2023-02-17 12:44 ` Andrew Jones
2023-02-09 15:26 ` [PATCH v4 7/8] RISC-V: KVM: Provide UAPI for Zicboz block size Andrew Jones
2023-02-09 15:26 ` [PATCH v4 8/8] RISC-V: KVM: Expose Zicboz to the guest Andrew Jones
2023-02-09 17:45 ` [PATCH v4 0/8] RISC-V: Apply Zicboz to clear_page Conor Dooley
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