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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id hz13-20020a1709072ced00b008b30e2a450csm4648847ejc.144.2023.02.20.08.10.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Feb 2023 08:10:11 -0800 (PST) Date: Mon, 20 Feb 2023 17:10:11 +0100 From: Andrew Jones To: Sunil V L Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Anup Patel , Atish Patra , "Rafael J . Wysocki" Subject: Re: [PATCH V2 07/21] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Message-ID: <20230220161011.d3ad4dhuv5ocsa7s@orel> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> <20230216182043.1946553-8-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230216182043.1946553-8-sunilvl@ventanamicro.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230220_081016_995070_0FA416A3 X-CRM114-Status: GOOD ( 25.47 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Feb 16, 2023 at 11:50:29PM +0530, Sunil V L wrote: > processor_core needs arch-specific functions to map the ACPI ID > to the physical ID. In RISC-V platforms, hartid is the physical id > and RINTC structure in MADT provides this mapping. Add arch-specific > function to get this mapping from RINTC. > > Signed-off-by: Sunil V L > Acked-by: Rafael J. Wysocki > --- > arch/riscv/include/asm/acpi.h | 3 +++ > drivers/acpi/processor_core.c | 29 +++++++++++++++++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h > index 7f9dce3c39d0..4a3622b38159 100644 > --- a/arch/riscv/include/asm/acpi.h > +++ b/arch/riscv/include/asm/acpi.h > @@ -15,6 +15,9 @@ > /* Basic configuration for ACPI */ > #ifdef CONFIG_ACPI > > +typedef u64 phys_cpuid_t; > +#define PHYS_CPUID_INVALID INVALID_HARTID > + > /* ACPI table mapping after acpi_permanent_mmap is set */ > void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); > #define acpi_os_ioremap acpi_os_ioremap > diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c > index 2ac48cda5b20..d6606a9f2da6 100644 > --- a/drivers/acpi/processor_core.c > +++ b/drivers/acpi/processor_core.c > @@ -106,6 +106,32 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, > return -EINVAL; > } > > +/* > + * Retrieve the RISC-V hartid for the processor > + */ > +static int map_rintc_hartid(struct acpi_subtable_header *entry, > + int device_declaration, u32 acpi_id, > + phys_cpuid_t *hartid) > +{ > + struct acpi_madt_rintc *rintc = > + container_of(entry, struct acpi_madt_rintc, header); > + > + if (!(rintc->flags & ACPI_MADT_ENABLED)) > + return -ENODEV; > + > + /* device_declaration means Device object in DSDT, in the > + * RISC-V, logical processors are required to > + * have a Processor Device object in the DSDT, so we should > + * check device_declaration here > + */ > + if (device_declaration && rintc->uid == acpi_id) { > + *hartid = rintc->hart_id; > + return 0; > + } > + > + return -EINVAL; > +} > + > static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, > int type, u32 acpi_id) > { > @@ -136,6 +162,9 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, > } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) { > if (!map_gicc_mpidr(header, type, acpi_id, &phys_id)) > break; > + } else if (header->type == ACPI_MADT_TYPE_RINTC) { > + if (!map_rintc_hartid(header, type, acpi_id, &phys_id)) > + break; > } > entry += header->length; > } > -- > 2.34.1 > Reviewed-by: Andrew Jones Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv