From: Dylan Jhong <dylan@andestech.com>
To: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <guoren@kernel.org>, <sergey.matyukevich@syntacore.com>,
<aou@eecs.berkeley.edu>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <x5710999x@gmail.com>,
<tim609@andestech.com>, <peterlin@andestech.com>,
<ycliang@andestech.com>, Dylan Jhong <dylan@andestech.com>
Subject: [PATCH v2] riscv: mm: Fix incorrect ASID argument when flushing TLB
Date: Mon, 13 Mar 2023 11:49:06 +0800 [thread overview]
Message-ID: <20230313034906.2401730-1-dylan@andestech.com> (raw)
Currently, we pass the CONTEXTID instead of the ASID to the TLB flush
function. We should only take the ASID field to prevent from touching
the reserved bit field.
Fixes: 3f1e782998cd ("riscv: add ASID-based tlbflushing methods")
Signed-off-by: Dylan Jhong <dylan@andestech.com>
---
Changes from v2:
- Remove unsued EXPORT_SYMBOL()
---
arch/riscv/include/asm/tlbflush.h | 2 ++
arch/riscv/mm/context.c | 2 +-
arch/riscv/mm/tlbflush.c | 2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h
index 907b9efd39a8..597d6d8aec28 100644
--- a/arch/riscv/include/asm/tlbflush.h
+++ b/arch/riscv/include/asm/tlbflush.h
@@ -12,6 +12,8 @@
#include <asm/errata_list.h>
#ifdef CONFIG_MMU
+extern unsigned long asid_mask;
+
static inline void local_flush_tlb_all(void)
{
__asm__ __volatile__ ("sfence.vma" : : : "memory");
diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
index 80ce9caba8d2..6d1aeb063e81 100644
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
@@ -22,7 +22,7 @@ DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
static unsigned long asid_bits;
static unsigned long num_asids;
-static unsigned long asid_mask;
+unsigned long asid_mask;
static atomic_long_t current_version;
diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
index ce7dfc81bb3f..ba4c27187c95 100644
--- a/arch/riscv/mm/tlbflush.c
+++ b/arch/riscv/mm/tlbflush.c
@@ -27,7 +27,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start,
/* check if the tlbflush needs to be sent to other CPUs */
broadcast = cpumask_any_but(cmask, cpuid) < nr_cpu_ids;
if (static_branch_unlikely(&use_asid_allocator)) {
- unsigned long asid = atomic_long_read(&mm->context.id);
+ unsigned long asid = atomic_long_read(&mm->context.id) & asid_mask;
/*
* TLB will be immediately flushed on harts concurrently
--
2.34.1
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next reply other threads:[~2023-03-13 3:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 3:49 Dylan Jhong [this message]
2023-03-13 5:58 ` [PATCH v2] riscv: mm: Fix incorrect ASID argument when flushing TLB Sergey Matyukevich
2023-03-14 2:22 ` Zong Li
2023-03-14 7:27 ` Dylan Jhong
2023-03-21 2:42 ` Dylan Jhong
2023-03-22 5:45 ` Palmer Dabbelt
2023-03-23 20:47 ` Palmer Dabbelt
2023-03-23 21:00 ` patchwork-bot+linux-riscv
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