From: Leonardo Bras <leobras@redhat.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Leonardo Bras <leobras@redhat.com>, Guo Ren <guoren@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [RESEND RFC PATCH v2 1/6] riscv/cmpxchg: Deduplicate cmpxchg() asm functions
Date: Tue, 21 Mar 2023 04:42:44 -0300 [thread overview]
Message-ID: <20230321074249.2221674-2-leobras@redhat.com> (raw)
In-Reply-To: <20230321074249.2221674-1-leobras@redhat.com>
In this header every cmpxchg define (_relaxed, _acquire, _release,
vanilla) contain it's own asm file, both for 4-byte variables an 8-byte
variables, on a total of 8 versions of mostly the same asm.
This is usually bad, as it means any change may be done in up to 8
different places.
Unify those versions by creating a new define with enough parameters to
generate any version of the previous 8.
(This did not cause any change in generated asm)
Signed-off-by: Leonardo Bras <leobras@redhat.com>
---
arch/riscv/include/asm/cmpxchg.h | 102 ++++++++-----------------------
1 file changed, 24 insertions(+), 78 deletions(-)
diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 12debce235e52..21984d24cbfe7 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -163,6 +163,22 @@
* store NEW in MEM. Return the initial value in MEM. Success is
* indicated by comparing RETURN with OLD.
*/
+
+#define ___cmpxchg(lr_sfx, sc_sfx, prepend, append) \
+{ \
+ __asm__ __volatile__ ( \
+ prepend \
+ "0: lr" lr_sfx " %0, %2\n" \
+ " bne %0, %z3, 1f\n" \
+ " sc" sc_sfx " %1, %z4, %2\n" \
+ " bnez %1, 0b\n" \
+ append \
+ "1:\n" \
+ : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
+ : "rJ" ((long)__old), "rJ" (__new) \
+ : "memory"); \
+}
+
#define __cmpxchg_relaxed(ptr, old, new, size) \
({ \
__typeof__(ptr) __ptr = (ptr); \
@@ -172,26 +188,10 @@
register unsigned int __rc; \
switch (size) { \
case 4: \
- __asm__ __volatile__ ( \
- "0: lr.w %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.w %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" ((long)__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".w", ".w", "", ""); \
break; \
case 8: \
- __asm__ __volatile__ ( \
- "0: lr.d %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.d %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" (__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".d", ".d", "", ""); \
break; \
default: \
BUILD_BUG(); \
@@ -216,28 +216,10 @@
register unsigned int __rc; \
switch (size) { \
case 4: \
- __asm__ __volatile__ ( \
- "0: lr.w %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.w %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- RISCV_ACQUIRE_BARRIER \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" ((long)__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".w", ".w", "", RISCV_ACQUIRE_BARRIER); \
break; \
case 8: \
- __asm__ __volatile__ ( \
- "0: lr.d %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.d %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- RISCV_ACQUIRE_BARRIER \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" (__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".d", ".d", "", RISCV_ACQUIRE_BARRIER); \
break; \
default: \
BUILD_BUG(); \
@@ -262,28 +244,10 @@
register unsigned int __rc; \
switch (size) { \
case 4: \
- __asm__ __volatile__ ( \
- RISCV_RELEASE_BARRIER \
- "0: lr.w %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.w %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" ((long)__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".w", ".w", RISCV_RELEASE_BARRIER, ""); \
break; \
case 8: \
- __asm__ __volatile__ ( \
- RISCV_RELEASE_BARRIER \
- "0: lr.d %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.d %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" (__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".d", ".d", RISCV_RELEASE_BARRIER, ""); \
break; \
default: \
BUILD_BUG(); \
@@ -308,28 +272,10 @@
register unsigned int __rc; \
switch (size) { \
case 4: \
- __asm__ __volatile__ ( \
- "0: lr.w %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.w.rl %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- " fence rw, rw\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" ((long)__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".w", ".w.rl", "", " fence rw, rw\n"); \
break; \
case 8: \
- __asm__ __volatile__ ( \
- "0: lr.d %0, %2\n" \
- " bne %0, %z3, 1f\n" \
- " sc.d.rl %1, %z4, %2\n" \
- " bnez %1, 0b\n" \
- " fence rw, rw\n" \
- "1:\n" \
- : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \
- : "rJ" (__old), "rJ" (__new) \
- : "memory"); \
+ ___cmpxchg(".d", ".d.rl", "", " fence rw, rw\n"); \
break; \
default: \
BUILD_BUG(); \
--
2.40.0
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next prev parent reply other threads:[~2023-03-21 7:43 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-21 7:42 [RESEND RFC PATCH v2 0/6] Deduplicating RISCV cmpxchg.h macros Leonardo Bras
2023-03-21 7:42 ` Leonardo Bras [this message]
2023-03-22 0:45 ` [RESEND RFC PATCH v2 1/6] riscv/cmpxchg: Deduplicate cmpxchg() asm functions Andrea Parri
2023-03-22 3:50 ` Leonardo Bras Soares Passos
2023-03-22 7:50 ` Andrea Parri
2023-03-21 7:42 ` [RESEND RFC PATCH v2 2/6] riscv/cmpxchg: Deduplicate cmpxchg() macros Leonardo Bras
2023-03-21 7:42 ` [RESEND RFC PATCH v2 3/6] riscv/cmpxchg: Deduplicate arch_cmpxchg() macros Leonardo Bras
2023-03-21 7:42 ` [RESEND RFC PATCH v2 4/6] riscv/cmpxchg: Deduplicate xchg() asm functions Leonardo Bras
2023-03-21 7:42 ` [RESEND RFC PATCH v2 5/6] riscv/cmpxchg: Deduplicate xchg() macros Leonardo Bras
2023-03-21 7:42 ` [RESEND RFC PATCH v2 6/6] riscv/cmpxchg: Deduplicate arch_xchg() macros Leonardo Bras
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