From: Minda Chen <minda.chen@starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Conor Dooley <conor@kernel.org>, Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Pawel Laszczak <pawell@cadence.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Peter Chen <peter.chen@kernel.org>,
Roger Quadros <rogerq@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-phy@lists.infradead.org>, <linux-usb@vger.kernel.org>,
<linux-riscv@lists.infradead.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
"Minda Chen" <minda.chen@starfivetech.com>,
Mason Huo <mason.huo@starfivetech.com>
Subject: [PATCH v4 5/7] dt-bindings: usb: Add StarFive JH7110 USB Bindings YAML schemas
Date: Thu, 6 Apr 2023 09:52:14 +0800 [thread overview]
Message-ID: <20230406015216.27034-6-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20230406015216.27034-1-minda.chen@starfivetech.com>
StarFive JH7110 platforms USB have a wrapper module around
the Cadence USBSS-DRD controller. Add binding information doc
for that.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Peter Chen <peter.chen@kernel.org>
---
.../bindings/usb/starfive,jh7110-usb.yaml | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
diff --git a/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml b/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
new file mode 100644
index 000000000000..c8b30b583854
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller
+
+maintainers:
+ - Minda Chen <minda.chen@starfivetech.com>
+
+properties:
+ compatible:
+ const: starfive,jh7110-usb
+
+ reg:
+ items:
+ - description: OTG controller registers
+ - description: XHCI Host controller registers
+ - description: DEVICE controller registers
+
+ reg-names:
+ items:
+ - const: otg
+ - const: xhci
+ - const: dev
+
+ interrupts:
+ items:
+ - description: XHCI host controller interrupt
+ - description: Device controller interrupt
+ - description: OTG/DRD controller interrupt
+
+ interrupt-names:
+ items:
+ - const: host
+ - const: peripheral
+ - const: otg
+
+ clocks:
+ items:
+ - description: lpm clock
+ - description: stb clock
+ - description: apb clock
+ - description: axi clock
+ - description: utmi apb clock
+
+ clock-names:
+ items:
+ - const: lpm
+ - const: stb
+ - const: apb
+ - const: axi
+ - const: utmi_apb
+
+ resets:
+ items:
+ - description: PWRUP reset
+ - description: APB clock reset
+ - description: AXI clock reset
+ - description: UTMI_APB clock reset
+
+ reset-names:
+ items:
+ - const: pwrup
+ - const: apb
+ - const: axi
+ - const: utmi
+
+ starfive,stg-syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle to System Register Controller stg_syscon node.
+ - description: register offset of STG_SYSCONSAIF__SYSCFG register for USB.
+ description:
+ The phandle to System Register Controller syscon node and the offset
+ of STG_SYSCONSAIF__SYSCFG register for USB.
+
+ dr_mode:
+ enum: [host, otg, peripheral]
+
+ phys:
+ minItems: 1
+ maxItems: 2
+
+ phy-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ anyOf:
+ - const: usb2-phy
+ - const: usb3-phy
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - resets
+ - starfive,stg-syscon
+ - dr_mode
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ usb@10100000 {
+ compatible = "starfive,jh7110-usb";
+ reg = <0x0 0x10100000 0x0 0x10000>,
+ <0x0 0x10110000 0x0 0x10000>,
+ <0x0 0x10120000 0x0 0x10000>;
+ reg-names = "otg", "xhci", "dev";
+ interrupts = <100>, <108>, <110>;
+ interrupt-names = "host", "peripheral", "otg";
+ clocks = <&syscrg 4>,
+ <&stgcrg 5>,
+ <&stgcrg 1>,
+ <&stgcrg 3>,
+ <&stgcrg 2>;
+ clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
+ resets = <&stgcrg 10>,
+ <&stgcrg 8>,
+ <&stgcrg 7>,
+ <&stgcrg 9>;
+ reset-names = "pwrup", "apb", "axi", "utmi";
+ starfive,stg-syscon = <&stg_syscon 0x4>;
+ dr_mode = "host";
+ };
+ };
--
2.17.1
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next prev parent reply other threads:[~2023-04-06 1:53 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-06 1:52 [PATCH v4 0/7] Add JH7110 USB and USB PHY driver support Minda Chen
2023-04-06 1:52 ` [PATCH v4 1/7] dt-bindings: phy: Add StarFive JH7110 USB document Minda Chen
2023-04-12 8:26 ` Krzysztof Kozlowski
2023-04-06 1:52 ` [PATCH v4 2/7] dt-bindings: phy: Add StarFive JH7110 PCIe document Minda Chen
2023-04-12 8:28 ` Krzysztof Kozlowski
2023-04-06 1:52 ` [PATCH v4 3/7] phy: starfive: add JH7110 USB 2.0 PHY driver Minda Chen
2023-04-06 1:52 ` [PATCH v4 4/7] phy: starfive: add JH7110 PCIE " Minda Chen
2023-04-06 1:52 ` Minda Chen [this message]
2023-04-12 8:32 ` [PATCH v4 5/7] dt-bindings: usb: Add StarFive JH7110 USB Bindings YAML schemas Krzysztof Kozlowski
2023-04-13 10:42 ` Minda Chen
2023-04-06 1:52 ` [PATCH v4 6/7] usb: cdns3: add StarFive JH7110 USB driver Minda Chen
2023-04-11 1:01 ` Peter Chen
2023-04-12 6:14 ` Minda Chen
2023-04-06 1:52 ` [PATCH v4 7/7] riscv: dts: starfive: add USB dts configuration for JH7110 Minda Chen
2023-04-12 8:26 ` [PATCH v4 0/7] Add JH7110 USB and USB PHY driver support Krzysztof Kozlowski
2023-04-13 10:44 ` Minda Chen
2023-04-13 14:13 ` Krzysztof Kozlowski
2023-04-18 11:12 ` Minda Chen
2023-04-18 12:22 ` Krzysztof Kozlowski
2023-04-19 8:16 ` Minda Chen
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